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US 9,959,124 B1Granted
Secure bypass of low-level configuration in reconfiguration of a computing system
AssigneeApple Inc.
InventorsGilbert H. Herbeck, Manu Gulati, Erik P. Machnicki, Timothy R. Paaske
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Abstract
In an embodiment, a system includes a functional unit that remains powered when the remainder of the system is powered off. The functional unit may, in response to a transition from a first power state to a second power state, retrieve configuration information from a read-only memory. In some embodiments, may be configured to store at least a portion of the configured information in a secure portion of a memory included in the functional unit and then lock the secure portion of the memory. The functional unit may then complete the transition to the second power state.
Claims16
An apparatus, comprising:
- a peripheral processing circuit;
- one or more sensors;
- a memory included in an always-on power domain;
- a plurality of registers included in the always-on power domain;
- and
- a processor included in the always-on power domain, wherein the processor is, in response to a change in a programmable configuration of the peripheral processing circuit, configured to:
- determine capabilities of the peripheral processing circuit;
- determine one or more configuration parameters for the peripheral processing circuit using the determined capabilities;
- store the one or more configuration parameters in the peripheral processing circuit;
- and
- during a reduced power mode of the peripheral processing circuit, the processor is further configured to:
- read data from at least one of the one or more sensors;
- filter the data read from the at least one of the one or more sensors;
- and
- initiate a power mode change of the peripheral processing circuit based on a comparison of an amount of available storage space in the memory to a threshold value;
- following a power mode change of the peripheral processing circuit, the processor is further configured to:
- store at least a portion of the configuration parameters in a portion of the memory;
- store information indicative of a location of the portion of the memory in at least one register of the plurality of registers;
- and
- lock the portion of the memory and the at least one register from further updates.
17 more elements
A method for operating a computing system, the method comprising:
- initiating a transition from a first power state to a second power state, wherein a power consumed by the computing system in the second power state is greater than a power consumed by the computing system in the first power state;
- retrieving configuration information from a memory;
- in response to determining a peripheral processing circuit is in a reduced power mode:
- reading data, by a processor included in an always-on power domain, from at least one of one or more sensors;
- filtering, by the processor, the data read from the at least one of the one or more sensors;
- and
- initiate a power mode change of the peripheral processing circuit based on a comparison of an amount of available storage space in the memory to a threshold value;
- in response to a change in a programmable configuration of the peripheral processing circuit:
- determining, by the processor included in an always-on power domain, capabilities of the peripheral processing circuit;
- determining one or more configuration parameters for the peripheral processing circuit using the determined capabilities;
- storing the one or more configuration parameters in the peripheral processing circuit;
- and
- following a power mode change of the peripheral processing circuit:
- storing at least a portion of the configuration parameters in a portion of a memory included in the always-on power domain;
- storing information indicative of a location of the portion of the memory in at least one register of a plurality of registers included in the always-on power domain;
- and
- locking the portion of the memory and the at least one register from further updates.
14 more elements
A system, comprising:
- a first processor;
- a first memory;
- one or more sensors;
- a second memory included in an always-on power domain;
- a plurality of registers included in the always-on power domain;
- and
- a second processor included in an always-on power domain, wherein the second processor is configured to:
- while the first processor is in a reduced power mode:
- read data from at least one of the one or more sensors;
- filter the data read from the at least one of the one or more sensors;
- and
- initiate a power mode change of the peripheral processing circuit based on a comparison of an amount of available storage space in the memory to a threshold value;
- in response to a change in a programmable configuration of the first processor:
- determine capabilities of the first processor;
- determine one or more configuration parameters for the first processor using the determined capabilities;
- store the one or more configuration parameters in the first processor;
- store the one or more configuration parameters in a portion of the second memory;
- following a power mode change of the first processor:
- store at least a portion of the configuration parameters in a portion of the second memory;
- store information indicative of a location of the portion of the second memory in at least one register of the plurality of registers;
- and
- lock the portion of the second memory and the at least one register of the plurality of registers from further updates.
19 more elements
Dependencies are inferred from the claim text.