Binary fused multiply-add floating-point calculations
AssigneeInternational Business Machines Corporation
InventorsMichael Klein, Klaus M. Kroener, Cédric Lichtenau, Silvia Melitta Mueller
Life of this patent
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Abstract
A binary fused multiply-add floating-point unit configured to operate on an addend, a multiplier, and a multiplicand. The unit is configured to receive as the addend an unrounded result of a prior operation executed in the unit via an early result feedback path; to perform an alignment shift of the unrounded addend on an unrounded exponent and an unrounded mantissa; as well as perform a rounding correction for the addend in parallel to the actual alignment shift, responsive to a rounding-up signal.
Claims14
A method of performing binary floating point arithmetic calculations in a modified floating-point fused multiply-add unit configured to operate on an addend, a multiplier, and a multiplicand, the method comprising:
- receiving as the addend an unrounded result of a prior operation executed in the unit via an early result feedback path;
- performing an alignment shift by a shift amount, of the addend on an unrounded exponent and an unrounded mantissa;
- in parallel to performing the alignment shift, performing a rounding correction for the addend by a correction term applied to a multiplier reduction tree of the unit, the rounding correction being enabled by a rounding-up signal;
- and
- performing at least one of:
- obtaining the correction term by applying a decode function to the shift amount, based on an effective addition;
- or
- obtaining the correction term by applying a half-decode function to the shift amount, based on an effective subtraction.
A method of performing binary floating point arithmetic calculations in a modified floating-point fused multiply-add unit configured to operate on an addend, a multiplier, and a multiplicand, the method comprising:
- receiving as the addend an unrounded result of a prior operation executed in the unit via an early result feedback path;
- performing an alignment shift by a shift amount, of the addend on an unrounded exponent and an unrounded mantissa, wherein performing the alignment shift comprises calculating the shift amount and shifting an operand;
- in parallel to performing the alignment shift, performing a rounding correction for the addend, the rounding correction being enabled by a rounding-up signal;
- and
- generating a correction term used by the performing the rounding correction based on the shift amount.
Dependencies are inferred from the claim text.