Robust mechanism for adaptive power conservation in solid-state devices

A user device, comprising:

• at least one processor;
• at least one memory storage device;
• and
• at least one memory storing instructions that, when executed by the at least one processor, cause the user device to:
• determine, for the at least one memory storage device, based on a real-time clock (RTC) value, a total elapsed time since the user device was powered on for a first time, wherein the total elapsed time represents a system lifetime of the at least one memory storage device;
• obtain a low-power self-refresh (LPSR) transition value that indicates a total number of LPSR transitions that have been performed;
• scale, by an operating system of the user device, an LPSR idle interval based on the total elapsed time and the LPSR transition value to produce a scaled LPSR idle interval;
• and
• operate the at least one memory storage device in a power mode based at least in part on the scaled LPSR idle interval, wherein:
• the scaled LPSR idle interval adjusts a power cycle of the at least one memory storage device and the power cycle determines an average lifetime of the at least one memory storage device.

At least one non-transitory machine-readable storage medium storing instructions that, when executed by at least one processor included in a user device, cause the user device to determine a low-power self-refresh (LPSR) idle interval for at least one memory storage device included in the user device, by carrying out steps that include:

• obtaining, for the at least one memory storage device, a real-time clock (RTC) value to determine a total elapsed time since the user device was powered on for a first time, wherein the total elapsed time represents a system lifetime of the at least one memory storage device;
• obtaining an LPSR transition value that indicates a total number of LPSR transitions that have been performed;
• scaling, by an operating system of the user device, the LPSR idle interval based on the RTC value and the LPSR transition value to produce a scaled LPSR idle interval;
• and
• operating the at least one memory storage device in a power mode based at least in part on the scaled LPSR idle interval, wherein:
• the scaled LPSR idle interval adjusts a power cycle of the at least one memory storage device based on the LPSR idle interval, wherein the power cycle determines an average lifetime of the at least one memory storage device.