Array substrate and manufacturing method thereof, and display device
AssigneesBoe Technology Group Co., Ltd., Beijing Boe Display Technology Co., Ltd.
InventorsBo Feng, Yu Ma
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AssigneesBoe Technology Group Co., Ltd., Beijing Boe Display Technology Co., Ltd.
InventorsBo Feng, Yu Ma
Estimating the term…
The present application provides an array substrate and a manufacturing method thereof, and a display device, to solve the problem in the prior art that the resistance of the common electrode is large due to an improper layout of the common electrode so that the common electrode is easily affected by other signals to cause voltage fluctuation and thus the quality of the display is influenced. In the array substrate and the manufacturing method thereof, and the display device provided in the present application, since the first common electrode is provided in the source/drain metal layer and the second and third common electrodes are further formed, connection of the first, second and third common electrodes effectively enables a low-resistance common electrode, which is not easily influenced by other signals to cause voltage fluctuation, therefore, the quality of the display can be improved.
An array substrate comprising a plurality of pixel units arranged in a matrix on a base, wherein each pixel unit is connected to two gate lines and one data line and includes two sub-pixels, each sub-pixel is connected to one corresponding gate line of the two gate lines and the one data line, two gate lines are provided between two adjacent rows of pixel units, and one data line is provided between two adjacent columns of pixel units, wherein
A manufacturing method of an array substrate, comprising steps of:
A display device comprising an array substrate, wherein the array substrate comprises a plurality of pixel units arranged in a matrix on a base, wherein each pixel unit is connected to two gate lines and one data line and includes two sub-pixels, each sub-pixel is connected to one corresponding gate line of the two gate lines and the one data line, two gate lines are provided between two adjacent rows of pixel units, and one data line is provided between two adjacent columns of pixel units, and wherein
Dependencies are inferred from the claim text.