Liquid crystal display panel
AssigneeShenzhen China Star Optoelectronics Technology Co., Ltd.
InventorPeng Du
Life of this patent
Estimating the term…
Abstract
The present invention provides a liquid crystal display panel, comprising: a control terminal of the first main thin film transistor on the nth row of the pixels connected to a branch of the scanning lines to which the nth row of the pixels correspond; the control terminal of the second main thin film transistor on the nth row of the pixels connected to a first branch of the scanning line of the (n+1)th row; the control terminal of the auxiliary thin film transistor on the (n+1)th row of pixels connected to a branch of the scanning lines of the (n+1)th row.
Claims16
A liquid crystal display panel, comprising:
- a plurality of data lines for inputting data signals;
- a plurality of scanning lines for inputting scanning signals;
- each of the scanning lines comprising a first branch and a second branch;
- the first branch located on an upper edge of a pixel, the second branch located on a lower edge of the pixel;
- and the first branch and the second branch respectively correspond to a position at a junction of the two adjacent pixels;
- a plurality of pixels formed and enclosed by the data lines and the scanning lines, the pixels comprising main pixels and sub-pixels, the main pixels and the sub-pixels being disposed adjacently;
- the main pixels being correspondingly disposed with a first main thin film transistor, a second main thin film transistor, and a first capacitor;
- a control terminal of the first main thin film transistor on the nth row of the pixels connected to a branch of the scanning lines to which the nth row of the pixels correspond;
- a control terminal of the second main thin film transistor on the nth row of the pixels being connected to the first branch of the scanning line to which the (n+1)th row of the pixels correspond;
- a control terminal of an auxiliary thin film transistor on the (n+1)th row of pixels being connected to a branch of the scanning line to which the (n+1)th row of the pixels correspond;
- an input terminal of the first main thin film transistor connected to the data line, an output terminal of the first main thin film transistor connected to the first capacitor;
- the output terminal of the first main thin film transistor being further connected to an input terminal of the second main thin film transistor;
- wherein n is an integer greater than or equal to 2;
- the sub-pixel being correspondingly disposed with a first auxiliary thin film transistor and a second auxiliary thin film transistor;
- and
- an input terminal of the first auxiliary thin film transistor being connected to the data line an output terminal of the first auxiliary thin film transistor being connected to a second capacitor;
- the output terminal of the first auxiliary thin film transistor being further connected to an input terminal of the second auxiliary thin film transistor;
- a control terminal of the second auxiliary thin film transistor on the (n+1)th row of pixels connected to a second branch of the scanning line to which the nth row of the pixels correspond.
A liquid crystal display panel, comprising:
- a plurality of data lines for inputting data signals;
- a plurality of scanning lines for inputting scanning signals;
- each of the scanning lines comprising a first branch and a second branch;
- the first branch being located on an upper edge of a pixel, the second branch being located on a lower edge of the pixel;
- a plurality of pixels formed and enclosed by the data lines and the scanning lines, the pixels comprising main pixels and sub-pixels, the main pixels and the sub-pixels being disposed adjacently;
- the main pixels being correspondingly disposed with a first main thin film transistor, a second main thin film transistor, and a first capacitor;
- the sub-pixels being correspondingly disposed with at least an auxiliary thin film transistor, and a second capacitor;
- a control terminal of the first main thin film transistor on the nth row of the pixels connected to a branch of the scanning lines to which the nth row of the pixels correspond;
- a control terminal of the second main thin film transistor on the nth row of the pixels being connected to the first branch of the scanning line to which the (n+1)th row of the pixels correspond;
- a control terminal of a auxiliary thin film transistor on the (n+1)th row of pixels being connected to a branch of the scanning line to which the (n+1)th row of the pixels correspond;
- an input terminal of the first main thin film transistor connected to the data line, an output terminal of the first main thin film transistor connected to the first capacitor;
- the output terminal of the first main thin film transistor being further connected to an input terminal of the second main thin film transistor;
- and
- an input terminal of the auxiliary thin film transistor being connected to the data line, an output terminal of the auxiliary thin film transistor being connected to the second capacitor, wherein n is an integer greater than or equal to 2.
Dependencies are inferred from the claim text.