Self-aligned air gap spacer for nanosheet CMOS devices
AssigneeInternational Business Machines Corporation
InventorsShogo Mochizuki, Alexander Reznicek, Joshua M. Rubin, Junli Wang
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Abstract
A semiconductor structure is provided that contains a plurality of vertically stacked and spaced apart semiconductor nanosheets in which an inner dielectric liner and an air gap are present. Collectively, each inner spacer and air gap combination provides an inner spacer structure that separates a portion of a functional gate structure that surrounds each semiconductor nanosheet from a portion of a source/drain (S/D) semiconductor material structure that is present on each side of the functional gate structure.
Claims11
A semiconductor structure comprising:
- a plurality of vertically stacked and spaced apart semiconductor nanosheets suspended above a substrate, each semiconductor nanosheet having a pair of vertical end sidewalls;
- a functional gate structure surrounding a portion of each semiconductor nanosheet of the plurality of vertically stacked and spaced apart semiconductor nanosheets;
- a source/drain (S/D) semiconductor material structure extending from each vertical end sidewall of the semiconductor nanosheets and located on each side of the functional gate structure;
- an inner spacer liner located between each of the semiconductor nanosheets and physically contacting sidewalls of the functional gate structure;
- and
- an air gap positioned between each inner spacer liner and each source/drain (S/D) semiconductor material structure.
Dependencies are inferred from the claim text.