Operational amplifier circuit
AssigneeMitsubishi Electric Corporation
InventorTakayuki Nakai
Life of this patent
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Abstract
In an output amplifier stage of an operational amplifier circuit, the first p-well of the first nMOSFET and the second p-well of the second nMOSFET are connected to the fourth node. Further, the first n-well of the first pMOSFET and the second n-well of the second pMOSFET are connected to the fifth node. At least one of the fourth node and the fifth node is connected to an output terminal VOUT.
Claims8
An operational amplifier circuit comprising an output amplifier stage that amplifies a first voltage of a differential amplifier stage outputting the first voltage, and that outputs a voltage that is amplified from an output terminal, wherein the output amplifier stage includes:
- a first nMOSFET in which a first p-well is formed, a gate and a drain which are short-circuited are connected to a first node, and a source is connected to a second node;
- a second nMOSFET in which a second p-well is formed, a gate is connected to the first node, a drain is connected to a first reference terminal, and a source is connected to the output terminal;
- a first pMOSFET in which a first n-well is formed, a gate and a drain which are short-circuited are connected to a third node, and a source is connected to the second node;
- and
- a second pMOSFET in which a second n-well is formed, a gate is connected to the third node, a drain is connected to a second reference terminal, and a source is connected to the output terminal,
- and wherein the first p-well and the second p-well are connected to a fourth node,
- the first n-well and the second n-well are connected to a fifth node,
- and at least one of the fourth node and the fifth node is connected to the output terminal.
Dependencies are inferred from the claim text.