Device stack with novel gate capacitor topology

A monolithically integrated circuital arrangement comprising:

• a stack of a plurality of transistors arranged in a cascode configuration, comprising an input transistor and a plurality of cascode transistors;
• a first gate capacitor connected between a gate of a first cascode transistor of the plurality of cascode transistors of the stack and a reference voltage, the first gate capacitor configured to provide a first RF voltage at the gate of the first cascode transistor by way of coupling of an RF voltage at a source of the first cascode transistor;
• and
• a second gate capacitor connected between a gate of a second cascode transistor of the plurality of cascode transistor of the stack and the gate of the first cascode transistor, the second gate capacitor configured to couple the first RF voltage to the gate of the second cascode transistor and to further couple an RF voltage at a source of the second cascode transistor to the gate of the second cascode transistor to provide a second RF voltage at the gate of the second cascode transistor,
• wherein the first RF voltage and the second RF voltage are based on a desired distribution of an RF voltage at an output of the stack across the plurality of transistors of the stack.

A method for realizing a monolithically integrated circuit comprising a stack of a plurality of transistors arranged in a cascode configuration, the method comprising:

• connecting a first gate capacitor between a gate of a first cascode transistor of the stack and a reference voltage;
• based on the connecting, coupling an RF voltage at a source of the first cascode transistor to the gate of the first cascode transistor, thereby obtaining a first RF voltage at the gate of the first cascode transistor;
• connecting a second gate capacitor between a gate of a second cascode transistor of the stack and the gate of the first cascode transistor;
• based on the connecting of the second gate capacitor, coupling the first RF voltage to the gate of the second cascode transistor;
• based on the connecting of the second gate capacitor, further coupling an RF voltage at a source of the second cascode transistor to the gate of the second cascode transistor;
• and
• based on the further coupling, obtaining a second RF voltage at the gate of the second cascode transistor.