Three-dimensional ferroelectric memory device and method of making thereof
AssigneeSanDisk Technologies LLC
InventorsYangyin Chen, Christopher Petti
Life of this patent
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Abstract
A three-dimensional memory device includes an alternating stack of word lines and insulating layers, vertical semiconductor channels vertically extending through the alternating stack, and a ferroelectric memory material located between each vertical semiconductor channel and the word lines.
Claims19
A three-dimensional memory device, comprising:
- an alternating stack located over a substrate, wherein the alternating stack comprises alternating insulating layers and electrically conductive layers, and wherein the electrically conductive layers comprise word lines of the three-dimensional memory device;
- vertical semiconductor channels vertically extending through the alternating stack;
- and
- ferroelectric memory elements located between each vertical semiconductor channel and the electrically conductive layers of the alternating stack,
- wherein:
- the ferroelectric memory elements comprise ferroelectric material liners located in the alternating stack;
- a combination of each ferroelectric material liner and each electrically conductive layer in the alternating stack comprises a combined spacer;
- the alternating stack comprises alternating insulating layers and combined spacers;
- and
- each of the vertical semiconductor channels contacts each of the ferroelectric material liners, and wherein the three-dimensional memory device comprises at least one feature selected from:
- a first feature that the three-dimensional memory device further comprises:
- a semiconductor material layer located on or within the substrate, wherein each of the vertical semiconductor channels contacts the semiconductor material layer,
- a source region located in, or on, the semiconductor material layer and laterally offset from the vertical semiconductor channels, and
- drain regions located at an upper end of each of the vertical semiconductor channels;
- a second feature that the alternating stack comprises a terrace region in which each combined spacer except a topmost combined spacer laterally extends farther away from the vertical semiconductor channels than overlying combined spacers, and the three-dimensional memory device further comprises a plurality of contact via structures contacting a top surface of a respective one of the electrically conductive layers within the terrace region;
- and
- a third feature that the ferroelectric material liners comprise an orthorhombic metal oxide whose unit cell has a non-zero permanent electric dipole moment.
A method of forming a three-dimensional memory device, comprising:
- forming an alternating stack of insulating layers and sacrificial material layers over a substrate;
- forming vertical semiconductor channels through the alternating stack;
- and
- replacing the sacrificial material layers with combined spacers, each of which comprises a ferroelectric liner and an electrically conductive layer, after forming the vertical semiconductor channels,
- wherein the method comprises at least one feature selected from:
- a first feature that the method further comprises:
- forming a backside trench through the alternating stack of the insulating layers and the sacrificial material layers, and removing the sacrificial material layers by providing an etchant that etches the sacrificial material layers selective to the insulating layers through the backside trench, wherein backside recesses are formed in volumes from which the sacrificial material layers are removed, wherein the combined spacers are formed in the backside recesses;
- a second feature that the method further comprises:
- patterning the alternating stack to form a terrace region in which each sacrificial material layer except a topmost sacrificial material layer has a greater lateral extent than overlying sacrificial material layers, forming a retro-stepped dielectric material portion over the alternating stack in the terrace region, and forming a plurality of contact via structures through the retro-stepped dielectric material portion and on a top surface of a respective one of the electrically conductive layers within the terrace region;
- and
- a third feature that that the ferroelectric material liners comprise an orthorhombic metal oxide of which a unit cell has a permanent non-zero electric dipole moment, and the orthorhombic metal oxide comprises an orthorhombic hafnium doped zirconium oxide or an orthorhombic hafnium oxide doped with a dopant having an atomic radius that is between 40% smaller than to 15% larger than the atomic radium of hafnium.
A method of operating a ferroelectric three-dimensional memory device comprising an alternating stack of word lines and insulating layers, a vertical semiconductor channel, a source region, a drain region and a ferroelectric memory elements, the method comprising:
- writing a selected first ferroelectric memory material element between a selected word line and the vertical semiconductor channels into a state that locally decreases a threshold voltage inside the vertical semiconductor channel at a level of the selected word line by applying:
- a current flow bias voltage across the source region and the drain region of the vertical semiconductor channel;
- a selected word line voltage to the selected word line, wherein the selected word line voltage is a greater positive voltage with respect to voltages applied to the source region and the drain region;
- and
- an unselected word line voltage to each unselected word line that is less positive than the selected word line voltage.
Dependencies are inferred from the claim text.