Wafer-to-wafer bonding structure

A wafer-to-wafer bonding structure comprising:

• a first wafer including,
• a first semiconductor layer,
• a first multi-layered wiring layer on the first semiconductor layer,
• a first insulating layer on the first multi-layered wiring layer,
• a first conductive pad penetrating the first insulating layer, and
• a first barrier layer surrounding the first conductive pad;
• and
• a second wafer including,
• a second insulating layer on the first insulating layer, the second insulating layer bonded to the first insulating layer,
• a second conductive pad penetrating the second insulating layer and bonded to a portion of the first conductive pad,
• a second barrier layer surrounding the second conductive pad,
• a second multi-layered wiring layer on the second insulating layer and the second conductive pad, and
• a second semiconductor layer on the second multi-layered wiring layer;
• and
• a third barrier layer only between the first and second wafers where the first and second conductive pads not bonded to each other,
• wherein the first conductive pad is a first recessed conductive pad and a first seed layer is on the first recessed conductive pad, and
• wherein the second conductive pad is a second recessed conductive pad and a second seed layer is on the second recessed conductive pad.

A bonding structure comprising:

• a first wafer including a first insulating layer and a first conductive pad embedded in the first insulating layer;
• a second wafer bonded to the first wafer, the second wafer including a second insulating layer and a second conductive pad embedded in the second insulating layer, the second conductive pad overlapping a portion of the first conductive pad such that the first and second conductive pads are not vertically aligned;
• and
• a barrier metal layer only on an interface between the first and second wafers where the first and second conductive pads do not overlap,
• wherein the first conductive pad is a first recessed conductive pad and a first seed layer is on the first recessed conductive pad, and
• wherein the second conductive pad is a second recessed conductive pad and a second seed layer is on the second recessed conductive pad.