Radio frequency device packages and methods of formation thereof

A method of assembling a semiconductor device package, the method comprising:

• forming an integrated circuit chip comprising a radio frequency device, wherein the radio frequency device comprises active circuitry at a first surface of the integrated circuit chip;
• forming a first conductive layer over the first surface of the integrated circuit chip;
• patterning the first conductive layer to form a first transmission line electrically coupled to the integrated circuit chip;
• forming a first laminate layer over the first conductive layer, wherein the first laminate layer overlaps a first part of the first transmission line;
• forming a second conductive layer over the first laminate layer;
• forming a first opening in the second conductive layer, wherein the first opening overlaps a second part of the first transmission line;
• forming a second laminate layer over the second conductive layer;
• forming a first antenna over the second laminate layer overlapping the first opening, the second part of the first transmission line, and the integrated circuit chip;
• forming a second transmission line in the first conductive layer during the patterning of the first conductive layer;
• and
• forming a second antenna over the second laminate layer and overlapping a part of the second transmission line.

A system comprising:

• a printed circuit board;
• an integrated circuit chip comprising a radio frequency receiver, transmitter, or transceiver;
• a first ground plane located above the integrated circuit chip;
• a transmission slot in the first ground plane;
• an antenna located above the first ground plane, wherein the antenna overlaps the integrated circuit chip, and wherein the antenna is directly above the transmission slot;
• a transmission line between the integrated circuit chip and the first ground plane, wherein the transmission line is electrically coupled to the integrated circuit chip, and wherein the transmission line is electromagnetically coupled to the antenna;
• a package region, wherein the integrated circuit chip, the transmission line, the first ground plane, and the antenna are in the package region;
• and
• a via disposed in the package region and electrically coupled to the first ground plane, the via extending from the first ground plane to an outer surface of the package region.

A semiconductor device package comprising:

• an integrated circuit chip comprising a radio frequency device, wherein the radio frequency device comprises active circuitry at a first surface of the integrated circuit chip;
• and
• an antenna substrate disposed over the first surface of the integrated circuit chip, the antenna substrate comprising
• a first conductive layer disposed over the first surface of the integrated circuit chip, wherein the first conductive layer comprises a first transmission line electrically coupled to the integrated circuit chip,
• a first laminate layer disposed over the first conductive layer, wherein the first laminate layer overlaps a first part of the first transmission line,
• a second conductive layer disposed over the first laminate layer, wherein the second conductive layer comprises a first opening overlapping a second part of the first transmission line,
• a second laminate layer disposed over the second conductive layer,
• a first antenna disposed over the second laminate layer and overlapping the first opening, the second part of the first transmission line, and the integrated circuit chip,
• a third laminate layer disposed over the first antenna, and
• a second antenna disposed over the third laminate layer, wherein the second antenna is directly over the first antenna.

A semiconductor device package comprising:

• an integrated circuit chip comprising a radio frequency device, wherein the radio frequency device comprises active circuitry at a first surface of the integrated circuit chip;
• and
• an antenna substrate disposed over the first surface of the integrated circuit chip, the antenna substrate comprising
• a first conductive layer disposed over the first surface of the integrated circuit chip, wherein the first conductive layer comprises a first transmission line electrically coupled to the integrated circuit chip,
• a first laminate layer disposed over the first conductive layer, wherein the first laminate layer overlaps a first part of the first transmission line,
• a second conductive layer disposed over the first laminate layer, wherein the second conductive layer comprises a first opening overlapping a second part of the first transmission line,
• a second laminate layer disposed over the second conductive layer,
• a cavity disposed in the second laminate layer, wherein the cavity overlaps a third part of the first transmission line, and
• a third laminate layer disposed over the second laminate layer,
• a first antenna disposed on a surface of the third laminate layer that is inside the cavity and overlapping the first opening, the second part of the first transmission line, and the integrated circuit chip.