Multilevel template assisted wafer bonding

A method of fabricating a multilevel semiconductor structure, the method comprising:

• providing a first substrate including a first plurality of devices;
• providing a second substrate including a second plurality of devices;
• dicing the second substrate to provide a plurality of dies, each die including one or more of the second plurality of devices;
• providing a third substrate;
• mounting the plurality of dies on predetermined portions of the third substrate;
• aligning the first substrate and the third substrate;
• joining the first substrate and the third substrate to form a composite structure;
• removing at least a portion of the third substrate from the composite structure;
• providing a fourth substrate;
• aligning the fourth substrate with the composite structure after providing the fourth substrate;
• and
• joining the fourth substrate and the composite structure, after aligning the fourth substrate with the composite structure, to form a semiconductor structure having multiple levels.