High loop-gain pHEMT regulator for linear RF power amplifier

Voltage regulator circuitry comprising:

• a first gain stage comprising:
• a first transistor comprising a gate contact, a drain contact coupled to a supply voltage node, and a source contact coupled to a regulated output voltage node and to the gate contact via a current setting resistor;
• and
• a second transistor comprising a gate contact, a drain contact coupled to the gate contact of the first transistor, and a source contact coupled to a ground node;
• a second gain stage comprising:
• a third transistor comprising a gate contact, a drain contact coupled to the gate contact of the second transistor, and a source contact coupled to the ground node;
• and
• a first plurality of stacked gain stage diodes coupled in series between the regulated output voltage node and the drain contact of the third transistor such that an anode of a first one of the first plurality of stacked gain stage diodes is coupled to the regulated output voltage node and a cathode of a last one of the first plurality of stacked gain stage diodes is coupled to the drain contact of the third transistor;
• a third gain stage comprising:
• a fourth transistor comprising a gate contact, a drain contact coupled to the gate contact of the third transistor, and a source contact coupled to the ground node;
• and
• a second plurality of stacked gain stage diodes coupled in series between the regulated output voltage node and the drain contact of the fourth transistor such that an anode of a first one of the second plurality of stacked gain stage diodes is coupled to the regulated output voltage node and a cathode of a last one of the second plurality of stacked gain stage diodes is coupled to the drain contact of the fourth transistor;
• and
• a feedback stage comprising:
• a feedback resistor coupled between the gate contact of the fourth transistor and the ground node;
• and
• a plurality of stacked feedback diodes coupled between the regulated output voltage node and the feedback resistor such that an anode of a first one of the plurality of stacked feedback diodes is coupled to the regulated output voltage node and a cathode of a last one of the plurality of stacked feedback diodes is coupled to the feedback resistor.