# US 9,883,195 B2 · Image processing system and method for decoding during non-rendering period > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,883,195 B2 - Document ID: US9883195B2 - Status: Granted - Kind: B2 - Application number: 14/992,198 - Filed: 2016-01-11 - Published: 2016-09-22 - Granted: 2018-01-30 - Earliest claimed: 2015-03-17 - Assignees: Hanwha Techwin Co., Ltd. - Applicants: Hanwha Techwin Co., Ltd. - Inventors: Hyun Gyu Lee - Web page: https://patentgrep.com/patent/US9883195B2 ## CPC - H04N 19/44: Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder - G06T 1/20: Processor architectures; Processor configuration, e.g. pipelining - G09G 5/005: {Adapting incoming signals to the display format of the display terminal} - H04N 7/18: Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast - H04N 7/183: {for receiving images from a single remote source} - G06T 2200/28: involving image processing hardware - G09G 2340/02: Handling of images in compressed format, e.g. JPEG, MPEG - G09G 2340/0435: Change or adaptation of the frame rate of the video stream - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract An image processing apparatus and a method thereof are provided. The image processing apparatus includes at least one processor configured to implement: a decoder which decodes input image data; and a rendering module which renders the decoded image data according to a rendering cycle which corresponds to a refresh rate of a display to display a plurality of image frames of the image data, wherein the decoder decodes the input image data only when the processor is not being in use for rendering by the rendering module. ## Claims ### Claim 1 An image processing apparatus comprising at least one processor configured to implement: a decoder which decodes input image data; and a rendering module which renders the decoded image data according to a rendering cycle which corresponds to a refresh rate of a display to display a plurality of image frames of the image data, wherein the decoder decodes the input image data only when the processor is not being in use for rendering by the rendering module, and wherein the rendering cycle comprises a rendering period and a non-rendering period, and the decoder decodes the input image data only during the non-rendering period and not during the rendering period. ### Claim 2 (depends on 1) The image processing apparatus of claim 1, wherein the rendering module generates an operation signal for the decoder and transmits the operation signal to the decoder when the rendering module stops rendering, and in response to the operation signal being received, the decoder decodes the input image data. ### Claim 3 (depends on 1) The image processing apparatus of claim 1, wherein in response to only part of one image frame, constituting the input image data, being decoded during a current time period when the processor is not being in use for rendering by the rendering module, the decoder decodes the rest of the image frame in a plurality of next time periods. ### Claim 4 (depends on 1) The image processing apparatus of claim 1, wherein in response to only part of one image frame constituting the input image data being decoded during a current time period when the processor is not being in use for rendering by the rendering module, the decoder decodes another part of the image frame in a next time period when the processor is not being in use for rendering by the rendering module. ### Claim 5 (depends on 4) The image processing apparatus of claim 4, wherein the next time period arrives after the current time period and a time period when the processor is used by the rendering module. ### Claim 6 An image processing apparatus comprising at least one processor configured to implement: a decoder which decodes input image data; and a rendering module which renders the decoded image data according to a rendering cycle which corresponds to a refresh rate of a display to display a plurality of image frames of the image data, wherein the decoder decodes the input image data only when the processor is not being in use for rendering by the rendering module, wherein the rendering module transmits a decoding halt signal to the decoder to halt the decoding of the input image data and render the decoded image data. ### Claim 7 (depends on 1) The image processing apparatus of claim 1, wherein the rendering module checks the refresh rate of the display at predetermined time intervals and match the rendering cycle to the refresh rate of the display. ### Claim 8 An image processing method using at least one processor, the method comprising: decoding input image data; rendering the decoded image data according to a rendering cycle which corresponds to a refresh rate of a display to display a plurality of image frames of the image data in a plurality of rendering cycles, the rendering including a correction process to match an interval between the image frames of the image data to an interval between refreshes of a display, wherein the rendering cycle includes a rendering period during which the rendering the decoded image data including the correction process is performed and a non-rendering period during which no rendering is performed by the rendering module, wherein the decoding the input image data is performed only when the processor is not being in use for the rendering, and wherein the decoding the input image data is performed only during the non-rendering period and not during the rendering period. ### Claim 9 (depends on 8) The method of claim 8, further comprising generating and transmitting an operation signal when the rendering is stopped to trigger the decoding the input image data. ### Claim 10 (depends on 8) The method of claim 8, wherein the decoding the input image data comprises, in response to only part of one image frame, constituting the input image data, being decoded during a current time period when the processor is not being in use for rendering, decoding the rest of the image frame in a plurality of next time periods. ### Claim 11 (depends on 8) The method of claim 8, wherein the decoding the input image data comprises, in response to only part of one image frame, constituting the input image data, being decoded during a current time period when the processor is not being in use for rendering, decoding another part of the image frame in a next time period when the processor is not being in use for rendering. ### Claim 12 (depends on 11) The method of claim 11, wherein the next time period arrives after the current time period and a time period when the processor is used by the rendering module. ### Claim 13 (depends on 8) The method of claim 8, further comprising generating and transmitting a decoding halt signal to halt the decoding the input image data and rendering the decoded image data. ### Claim 14 (depends on 8) The method of claim 8, further comprising: checking the refresh rate of the display at predetermined time intervals; and matching the rendering cycle to the refresh rate of the display.