# US 9,882,761 B2 · System and method for enhanced channel estimation using tap-dependent frequency offset (FO) estimation

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- Number: US 9,882,761 B2
- Document ID: US9882761B2
- Status: Granted
- Kind: B2
- Application number: 15/210,468
- Filed: 2016-07-14
- Published: 2017-09-07
- Granted: 2018-01-30
- Earliest claimed: 2016-03-07
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., ltd.
- Inventors: Binnan Zhuang; Jung Hyun Bae; Dongwoon Bai; Jungwon Lee
- Web page: https://patentgrep.com/patent/US9882761B2

## CPC

- H04L 27/2662: {Symbol synchronisation}
- H04L 7/0058: {detection of error based on equalizer tap values}
- H04L 25/022: {of frequency response}
- H04L 25/025: {using least-mean-square [LMS] method}
- H04L 25/0256: {Channel estimation using minimum mean square error criteria}
- H04L 27/2657: {Carrier synchronisation}
- H04L 27/2695: {with channel estimation, e.g. determination of delay spread, derivative or peak tracking (channel estimation H04L25/0202)}
- H04L 7/033: using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L 2027/0055: {single phase}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

Apparatuses (and methods of manufacturing same), systems, and methods for channel interpolation/estimation and/or frequency tracking suitable for a receiver in a high speed single frequency network (HS-SFN) scenario are described. In one aspect, an estimated frequency offset (FO) correction is calculated for a received signal using at least an FO estimation provided by an automatic frequency control (AFC) in a first feedback loop and a channel estimate is calculated using at least the estimated FO and one or more channel parameter estimates from the AFC in a second feedback loop. In another aspect, a phase locked loop (PLL) receives an lth orthogonal frequency division multiplexing (OFDM) symbol and produces a per-tap phase value for each tap i of the lth OFDM symbol. The per-tap phase values of the lth OFDM symbol are used to generate the PLL output, which is also used as input to a feedback loop.

## Claims

### Claim 1

A method for channel estimation, comprising:
calculating an estimated frequency offset (FO) correction for a received signal using at least an FO estimation generated by an automatic frequency control (AFC) module using at least a previously-calculated channel estimate output from a channel estimator (CE) as input in a first feedback loop; and
calculating, by the CE, a current channel estimate using at least the received signal adjusted by the estimated FO correction from the first feedback loop and one or more channel parameter estimates generated by the AFC using at least the previously-calculated channel estimate output from the CE as input in a second feedback loop.

### Claim 2 (depends on 1)

The method of claim 1, wherein the one or more channel parameter estimates comprises a per-tap frequency offset estimation for each tap in each orthogonal frequency division multiplexing (OFDM) symbol.

### Claim 3 (depends on 2)

The method of claim 2, wherein calculating the channel estimate comprises:
calculating interpolation coefficients to interpolate frequency domain (FD) channel values using the per-tap frequency offset estimations.

### Claim 4 (depends on 1)

The method of claim 1, wherein the one or more channel parameter estimates comprise (i) a per-tap frequency offset estimation for each tap in each orthogonal frequency division multiplexing (OFDM) symbol, (ii) a per-tap channel power estimate, (iii) a per-tap delay estimate, and (iv) a noise variance estimate.

### Claim 5 (depends on 4)

The method of claim 4, wherein calculating the channel estimate comprises:
calculating minimum mean square error (MMSE) estimations using at least the four channel parameter estimates.

### Claim 6 (depends on 5)

The method of claim 5, further comprising:
obtaining a raw channel impulse response (CIR) of the received signal.

### Claim 7 (depends on 6)

The method of claim 6, wherein calculating the channel estimate further comprises:
calculating MMSE combining weights for each tap using at least the four channel parameter estimates; and
performing MMSE combining using the raw CIR and the MMSE combining weights.

### Claim 8 (depends on 5)

The method of claim 5, further comprising:
obtaining a raw frequency domain (FD) channel of the received signal.

### Claim 9 (depends on 8)

The method of claim 8, wherein calculating the channel estimate further comprises:
calculating MMSE combining weights for each subcarrier using at least the four channel parameter estimates; and
performing MMSE combining for each subcarrier using the raw FD channels and the MMSE combining weights.

### Claim 10 (depends on 8)

The method of claim 8, wherein calculating the channel estimate further comprises:
calculating MMSE combining weights and performing MMSE combining on subsampled subcarriers using at least the four channel parameter estimates and the raw FD channels; and
approximating an estimated FD channel based at least on the MMSE combining using MMSE combining weights calculated based on subsampled subcarriers.

### Claim 11 (depends on 1)

The method of claim 1, wherein the method is for channel estimation in a high speed single frequency network (HS-SFN).

### Claim 12

A phase locked loop (PLL), comprising:
a per-tap phase detector which receives an lth orthogonal frequency division multiplexing (OFDM) symbol, processes each tap i of the lth OFDM symbol, and produces a per-tap phase value for each tap i of the lth OFDM symbol;
an adder which sums all of the per-tap phase values of the lth OFDM symbol;
a loop filter which filters the sum of all of the per-tap phase values of the lth OFDM symbol to generate an output; and
a voltage-controlled oscillator (VCO) which receives the output of the loop filter and generates the output of the PLL, which is also used as input to the per-tap phase detector in a feedback loop.

### Claim 13 (depends on 12)

The PLL of claim 12, wherein a number K of taps of the lth OFDM symbol is determined, where i=0, 1, 2, . . . , K−1.

### Claim 14 (depends on 13)

The PLL of claim 13, wherein the output of the adder may be represented as:
εl=Σi=0K-1aiεl,i,
where ai is a real-valued scalar of tap i.

### Claim 15 (depends on 14)

The PLL of claim 14, wherein ai may be represented as:
a
i
=
p
i
∑
i
=
0
K
-
1
⁢
p
i
,
where pi is the power of tap i.

### Claim 16 (depends on 12)

The PLL of claim 12, wherein the per-tap phase detector produces the per-tap phase values for each tap i of the lth OFDM symbol in parallel.

### Claim 17

A method of operation of a phase locked loop (PLL) in an apparatus capable of channel estimation in a high speed single frequency network (HS-SFN), comprising:
receiving an lth orthogonal frequency division multiplexing (OFDM) symbol;
determining a number K of taps of the lth OFDM symbol, where i=0, 1, 2, . . . , K−1;
processing each tap i of the lth OFDM symbol and producing a per-tap phase value for each tap i of the lth OFDM symbol;
obtaining a sum of all of the per-tap phase values of the lth OFDM symbol;
filtering the sum of all of the per-tap phase values of the lth OFDM symbol; and
generating a channel estimation based at least on the filtered sum of all of the per-tap phase values of the lth OFDM symbol, wherein the generated channel estimation is also used in the steps of processing and producing per-tap phase values for each tap i of the (l+1)th OFDM symbol as part of a feedback loop.

### Claim 18

A chip capable of channel estimation in a high speed single frequency network (HS-SFN), comprising:
at least one non-transitory computer-readable medium; and
at least one processor, which, when executing instructions stored on one or more of the at least one non-transitory computer-readable medium, has the chip perform at least the following steps:
calculating an estimated frequency offset (FO) correction for a received signal using at least an FO estimation generated by an automatic frequency control (AFC) module using at least a previously-calculated channel estimate output from a channel estimator (CE) as input in a first feedback loop; and
calculating, by the CE, a current channel estimate using at least the received signal adjusted by the estimated FO correction from the first feedback loop and one or more channel parameter estimates generated by the AFC using at least the previously-calculated channel estimate output from the CE as input in a second feedback loop.

### Claim 19 (depends on 18)

The chip of claim 18, wherein the one or more channel parameter estimates comprises a per-tap frequency offset estimation for each tap in each orthogonal frequency division multiplexing (OFDM) symbol.

### Claim 20 (depends on 19)

The chip of claim 19, wherein calculating the channel estimate comprises:
calculating interpolation coefficients to interpolate frequency domain (FD) channel values using the per-tap frequency offset estimations.

### Claim 21 (depends on 18)

The chip of claim 18, wherein the one or more channel parameter estimates comprise (i) a per-tap frequency offset estimation for each tap in each orthogonal frequency division multiplexing (OFDM) symbol, (ii) a per-tap channel power estimate, (iii) a per-tap delay estimate, and (iv) a noise variance estimate.

### Claim 22 (depends on 21)

The chip of claim 21, wherein calculating the channel estimate comprises:
calculating minimum mean square error (MMSE) estimations using at least the four channel parameter estimates.

### Claim 23

A method of manufacturing a chip capable of channel estimation in a high speed single frequency network (HS-SFN), comprising:
forming at least one non-transitory computer-readable medium disposed as part of the chip; and
forming at least one processor disposed as part of the chip,
wherein the at least one processor, when executing instructions stored on one or more of the at least one non-transitory computer-readable medium, has the chip perform at least the following steps:
calculating an estimated frequency offset (FO) correction for a received signal using at least an FO estimation generated by an automatic frequency control (AFC) module using at least a previously-calculated channel estimate output from a channel estimator (CE) as input in a first feedback loop; and
calculating, by the CE, a current channel estimate using at least the received signal adjusted by the estimated FO correction from the first feedback loop and one or more channel parameter estimates generated by the AFC using at least the previously-calculated channel estimate output from the CE as input in a second feedback loop.