# US 9,882,490 B2 · Parallel high side switches for a buck converter > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,882,490 B2 - Document ID: US9882490B2 - Status: Granted - Kind: B2 - Application number: 15/160,836 - Filed: 2016-05-20 - Published: 2017-11-23 - Granted: 2018-01-30 - Earliest claimed: 2016-05-20 - Assignees: Texas Instruments Incorporated - Applicants: Texas Instruments Incorporated - Inventors: Srinivas Venkata Veeramreddi; Murugesh Prashanth Subramaniam - Web page: https://patentgrep.com/patent/US9882490B2 ## CPC - H02M 3/1588: {comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence)} - H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters - Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS ## Abstract A power stage for a DC-to-DC voltage converter includes a voltage input, a high-side n-channel transistor, a high-side p-channel transistor, and a low-side n-channel transistor. The voltage input is couplable to a supply voltage. The drain terminal of the high-side n-channel transistor is coupled to the voltage input and the source terminal is coupled to a first node that is couplable to an output stage of the DC-to-DC converter. The source terminal of the high-side p-channel transistor is coupled to the voltage input and the drain terminal is coupled to the first node. The drain terminal of the low-side n-channel transistor is coupled to the first node and the source terminal is coupled to a ground. ## Claims ### Claim 1 A power stage for a DC-to-DC voltage converter, comprising: a supply voltage input; a high-side n-channel transistor including a source terminal, a drain terminal and a gate terminal, the drain terminal being coupled to the supply voltage input and the source terminal being coupled to a first node that is coupled to an output of the DC-to-DC converter; a high-side p-channel transistor including a source terminal, a drain terminal and a gate terminal, the source terminal being coupled to the supply voltage input and the drain terminal being coupled to the first node; a low-side n-channel transistor including a source terminal, a drain terminal and a gate terminal, the drain terminal being coupled to the first node and the source terminal being coupled to a ground; and control circuitry operable to receive information regarding a supply voltage coupled to the voltage input: if the supply voltage is below a predetermined threshold value the control circuitry is operable to cause the high-side n-channel transistor to serve as the active high-side transistor of the DC-to-DC converter, while deactivating the high-side p-channel transistor by providing a constant voltage that is substantially equal to the supply voltage to the gate of the high-side p-channel transistor; and if the supply voltage is above the predetermined threshold value, the control circuitry is operable to cause the high-side p-channel transistor to serve as the active high-side transistor of the DC-to-DC converter by regulating the duty cycle of a gate driver signal provided to the gate of the high-side p-channel transistor in order to regulate an output voltage of the DC-to-DC converter, while deactivating the high-side n-channel transistor. ### Claim 2 (depends on 1) The power stage of claim 1, including a charge pump circuit operable to boost the voltage of the gate driver signal that is provided to the gate of the high-side n-channel transistor. ### Claim 3 (depends on 1) The power stage of claim 1, in which if the supply voltage is above the predetermined threshold voltage, the control circuit is operable to provide a constant voltage that is substantially equal to 0 volts to the gate of the high-side n-channel transistor to deactivate the high-side n-channel transistor, and operable to regulate the duty cycle of a gate driver signal provided to the gate of the high-side p-channel transistor in order to regulate an output voltage of the DC-to-DC converter. ### Claim 4 (depends on 1) The power stage of claim 1, in which the control circuitry is operable to cause the high-side n-channel transistor to serve as the active high-side transistor of the DC-to-DC converter, while deactivating the high-side p-channel transistor, if the power supply includes a first number of batteries of a given type, and operable to cause the high-side n-channel transistor to serve as the active high-side transistor of the DC-to-DC converter, while deactivating the high-side p-channel transistor, if the power supply includes a second number of batteries of a given type. ### Claim 5 (depends on 4) The power stage of claim 4, in which the given type of battery includes a AA cell, the first number of batteries includes a single battery, and the second number of batteries includes two batteries. ### Claim 6 (depends on 1) The power stage of claim 1 in which the high-side n-channel transistor includes an NMOS transistor, and the high-side p-channel transistor includes a PMOS transistor. ### Claim 7 A DC-to-DC voltage converter comprising: a supply voltage input; a high-side n-channel transistor including a source terminal, a drain terminal and a gate terminal, the drain terminal being coupled to the voltage input and the source terminal being coupled to a first node; a high-side p-channel transistor including a source terminal, a drain terminal and a gate terminal, the source terminal being coupled to the voltage input and the drain terminal being coupled to the first node; a low-side n-channel transistor including a source terminal, a drain terminal and a gate terminal, the drain terminal being coupled to the first node and the source terminal being coupled to ground; an inductor coupled between the first node and a converter output; a capacitor coupled between the converter output and ground; and control circuitry operable to receive information regarding a supply voltage coupled to the voltage input: if the supply voltage is below a predetermined threshold value, the control circuitry is operable to cause the high-side n-channel transistor to serve as the active high-side transistor of the DC-to-DC converter, while deactivating the high-side p-channel transistor by providing a constant voltage that is substantially equal to the supply voltage to the gate of the high-side p-channel transistor, and if the supply voltage is above the predetermined threshold value, the control circuitry is operable to cause the high-side p-channel transistor to serve as the active high-side transistor of the DC-to-DC converter by regulating the duty cycle of a gate driver signal provided to the gate of the high-side p-channel transistor in order to regulate an output voltage of the DC-to-DC converter, while deactivating the high-side n-channel transistor. ### Claim 8 (depends on 7) The DC-to-DC voltage converter of claim 7, including a charge pump circuit operable to boost the voltage of the gate driver signal that is provided to the gate of the high-side n-channel transistor. ### Claim 9 (depends on 7) The DC-to-DC voltage converter of claim 7, in which if the supply voltage is above the predetermined threshold voltage, the control circuit is operable to provide a constant voltage that is substantially equal to 0 volts to the gate of the high-side n-channel transistor, thereby deactivating the high-side n-channel transistor, and operable to regulate the duty cycle of a gate driver signal provided to the gate of the high-side p-channel transistor in order to regulate an output voltage of the DC-to-DC converter. ### Claim 10 (depends on 7) The DC-to-DC voltage converter of claim 7, in which the control circuitry is operable to cause the high-side n-channel transistor to serve as the active high-side transistor of the DC-to-DC converter, while deactivating the high-side p-channel transistor, if the power supply includes a first number of batteries of a given type, and operable to cause the high-side n-channel transistor to serve as the active high-side transistor of the DC-to-DC converter, while deactivating the high-side p-channel transistor, if the power supply includes a second number of batteries of a given type. ### Claim 11 (depends on 10) The DC-to-DC voltage converter of claim 10, in which the given type of battery includes a AA cell, the first number of batteries includes a single battery, and the second number of batteries includes two batteries. ### Claim 12 (depends on 7) The DC-to-DC voltage converter of claim 7 in which the high-side n-channel transistor includes an NMOS transistor, and the high-side p-channel transistor includes a PMOS transistor. ### Claim 13 A method of operating a power stage of a DC-to-DC converter, comprising: providing a high-side n-channel transistor including a source terminal, a drain terminal and a gate terminal, the drain terminal being coupled to a power supply voltage input, and the source terminal being coupled to a first node that is coupled to an output of the DC-to-DC converter; providing a high-side p-channel transistor including a source terminal, a drain terminal and a gate terminal, the source terminal being coupled to the voltage input and the drain terminal being coupled to the first node; comparing the power supply voltage to a threshold voltage level; if the power supply voltage is less than the threshold voltage level, causing the high-side n-channel transistor to serve as the active high-side transistor of the DC-to-DC converter, and deactivating the high-side p-channel transistor by providing a constant voltage that is substantially equal to the supply voltage to the gate of the high-side p-channel transistor; and if the power supply voltage is greater than the threshold voltage level, causing the high-side p-channel transistor to serve as the active high-side transistor of the DC-to-DC converter by regulating the duty cycle of a gate driver signal provided to the gate of the high-side p-channel transistor in order to regulate an output voltage of the DC-to-DC converter, and deactivating the high-side n-channel transistor. ### Claim 14 (depends on 13) The method of claim 13, including boosting, using a charge pump, the voltage of the gate driver signal that is provided to the gate of the high-side n-channel transistor. ### Claim 15 (depends on 14) The method of claim 14, including: if the power supply voltage is greater than the predetermined threshold voltage, providing a constant voltage that is substantially equal to 0 volts to the gate of the high-side n-channel transistor, to deactivate the high-side n-channel transistor.