# US 9,882,488 B2 · Enhanced power mode transitions in buck-boost converters > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,882,488 B2 - Document ID: US9882488B2 - Status: Granted - Kind: B2 - Application number: 15/078,841 - Filed: 2016-03-23 - Published: 2017-03-16 - Granted: 2018-01-30 - Earliest claimed: 2015-09-14 - Assignees: Intersil Americas Inc. - Applicants: Intersil Americas LLC - Inventors: Michael Jason Houston - Web page: https://patentgrep.com/patent/US9882488B2 ## CPC - H02M 3/1582: {Buck-boost converters (H02M3/1584 takes precedence)} - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract An electronic system, DC-DC voltage converter, method of operating a buck-boost DC-DC converter, and method for power mode transitioning in a DC-DC voltage converter are disclosed. For example, one method includes receiving a compensated error signal associated with an output voltage of the DC-DC voltage converter, determining a power mode of operation of the DC-DC voltage converter, and if the power mode of operation is a first mode, outputting a first control signal to regulate the output voltage of the DC-DC voltage converter. If the power mode of operation is a second mode, outputting a second control signal to regulate the output voltage of the DC-DC voltage converter, and if the power mode of operation is a third mode, outputting a third control signal to regulate the output voltage of the DC-DC voltage converter. ## Claims ### Claim 1 A method for power mode transitioning in a DC-DC voltage converter, the method comprising: receiving a compensated error signal associated with an output voltage of the DC-DC voltage converter; determining a power mode of operation of the DC-DC voltage converter; if the power mode of operation is a first mode, outputting a first control signal based on the compensated error signal, the first control signal being compared with a signal representative of an output current of the DC-DC voltage converter so as to regulate the output voltage of the DC-DC voltage converter; if the power mode of operation is a second mode, outputting a second control signal based on the compensated error signal, the second control signal being compared with the signal representative of the output current of the DC-DC voltage converter so as to regulate the output voltage of the DC-DC voltage converter; and if the power mode of operation is a third mode, outputting a third control signal based on the compensated error signal, the third control signal being compared with the signal representative of the output current of the DC-DC voltage converter so as to regulate the output voltage of the DC-DC voltage converter. ### Claim 2 (depends on 1) The method of claim 1, wherein the determining if the power mode of operation is the first mode comprises determining if the power mode of operation is a buck mode. ### Claim 3 (depends on 1) The method of claim 1, wherein the determining if the power mode of operation is the second mode comprises determining if the power mode of operation is a boost mode. ### Claim 4 (depends on 1) The method of claim 1, wherein the determining if the power mode of operation is the third mode comprises determining if the power mode of operation is a buck-boost mode. ### Claim 5 (depends on 1) The method of claim 1, wherein the outputting the first control signal to regulate the output voltage of the DC-DC voltage converter comprises outputting a computed control voltage based on the compensated error signal for a buck mode of operation. ### Claim 6 (depends on 1) The method of claim 1, wherein the outputting the second control signal to regulate the output voltage of the DC-DC voltage converter comprises outputting a computed control voltage based on the compensated error signal for a boost mode of operation. ### Claim 7 (depends on 1) The method of claim 1, wherein the outputting the third control signal to regulate the output voltage of the DC-DC voltage converter comprises outputting a control voltage based on the compensated error signal for a buck-boost mode of operation. ### Claim 8 (depends on 1) The method of claim 1, wherein the outputting the third control signal to regulate the output voltage of the DC-DC voltage converter comprises outputting the compensated error signal for a buck-boost mode of operation. ### Claim 9 (depends on 1) The method of claim 1, wherein the DC-DC voltage converter comprises a buck-boost converter. ### Claim 10 A method of operating a buck-boost DC-DC converter, the method comprising: monitoring an output voltage of the buck-boost DC-DC converter; responsive to the monitoring, generating a compensated error voltage associated with the output voltage; modifying the compensated error voltage responsive to a power mode of operation of the buck-boost DC-DC converter; generating a Pulse Width Modulation (PWM) control signal responsive to a comparison of the modified compensated error voltage with a signal representative of an output current of the DC-DC voltage converter; and controlling at least one of a boost power stage and a buck power stage of the buck-boost DC-DC converter responsive to the PWM control signal. ### Claim 11 (depends on 10) The method of claim 10, wherein the monitoring comprises an error amplifier receiving the output voltage of the buck-boost DC-DC converter, and generating the compensated error voltage responsive to the output voltage. ### Claim 12 (depends on 10) The method of claim 10, wherein the modifying the compensated error voltage comprises a computation circuit computing a scaled value of the compensated error voltage responsive to the power mode of operation of the buck-boost DC-DC converter, and generating the modified compensated error voltage responsive to the computed scaled value of the compensated error voltage. ### Claim 13 (depends on 12) The method of claim 12, wherein the computing the scaled value comprises determining a scaling factor of the computation circuit responsive to the power mode of operation of the buck-boost DC-DC converter. ### Claim 14 A DC-DC voltage converter, comprising: a buck power stage; a first switching transistor driver circuit coupled to the buck power stage; a boost power stage; a second switching transistor driver circuit coupled to the boost power stage; a logic circuit coupled to the first switching transistor driver circuit and the second switching transistor driver circuit; and a feedback circuit coupled to the logic circuit, wherein the feedback circuit includes: an error amplifier circuit coupled to the boost power stage, the error amplifier circuit configured to receive an output signal from the boost power stage and generate a compensated error signal associated with the output signal; a variable gain circuit coupled to the error amplifier circuit and configured to receive the compensated error signal, generate a modified compensated error signal for at least one power mode of operation of the DC-DC voltage converter, and output the modified compensated error signal for the at least one power mode of operation responsive to a transition between power modes; wherein the feedback circuit modifies an error signal responsive to a transition between power modes, the modified error signal being compared with a signal representative of an output current of the DC-DC voltage converter so as to regulate an output voltage of the DC-DC voltage converter. ### Claim 15 (depends on 14) The DC-DC voltage converter of claim 14, wherein the feedback circuit further includes: a pulse-width-modulated (PWM) signal generator circuit coupled to the variable gain circuit and configured to receive the modified compensated error signal responsive to the transition between power modes, and output a PWM signal, wherein the logic circuit is configured to receive the PWM signal and input and output voltages of the DC-DC voltage converter, and generate a first PWM signal to drive the buck power stage, a second PWM signal to drive the boost power stage, and a mode control signal. ### Claim 16 (depends on 15) The DC-DC voltage converter of claim 15, wherein the error amplifier circuit comprises an operational transconductance amplifier. ### Claim 17 (depends on 15) The DC-DC voltage converter of claim 15, wherein the variable gain circuit comprises a buck computation block, a boost computation block, and a multiplexer coupled to the buck computation block, the boost computation block, and an output of the error amplifier circuit. ### Claim 18 (depends on 15) The DC-DC voltage converter of claim 15, wherein the PWM signal generator circuit comprises a modulator circuit configured to generate the PWM signal responsive to the modified compensated error signal for the at least one power mode of operation. ### Claim 19 (depends on 15) The DC-DC voltage converter of claim 15, wherein the logic circuit is configured to receive the input voltage of the DC-DC voltage converter, the output voltage of the DC-DC voltage converter and the PWM signal, output the mode control signal responsive to the input voltage and the output voltage, and output a first PWM signal to drive the buck power stage and a second PWM signal to drive the boost power stage. ### Claim 20 (depends on 14) The DC-DC voltage converter of claim 14, wherein the DC-DC voltage converter comprises a buck-boost converter formed on an integrated circuit, wafer, chip or die. ### Claim 21 (depends on 14) The DC-DC voltage converter of claim 14, wherein the DC-DC voltage converter comprises a voltage-mode controlled PWM controller. ### Claim 22 (depends on 14) The DC-DC voltage converter of claim 14, wherein the feedback circuit comprises: an error amplifier circuit coupled to the boost power stage, the error amplifier circuit configured to receive an output signal from the boost power stage and generate a compensated error signal associated with the output signal; a modulator amplifier circuit coupled to the error amplifier circuit and configured to receive the compensated error signal and generate a modified compensated error signal for at least one power mode of operation of the DC-DC voltage converter, and output the modified compensated error signal responsive to the transition between power modes; and a modulator circuit coupled to the modulator amplifier circuit and configured to receive the modified compensated error signal responsive to the transition between power modes, and output a PWM signal responsive to the modified compensated error signal. ### Claim 23 (depends on 22) The DC-DC voltage converter of claim 22, wherein the transition between power modes comprises at least one of a transition to a buck-boost power mode of operation or a transition from a buck-boost power mode of operation. ### Claim 24 (depends on 22) The DC-DC voltage converter of claim 22, the modulator amplifier circuit further comprising at least one switchable gain circuit, wherein the at least one switchable gain circuit is configured to receive the compensated error signal and generate the modified compensated error signal responsive to a control signal associated with the transition between power modes. ### Claim 25 (depends on 24) The DC-DC voltage converter of claim 24, wherein the at least one switchable gain circuit comprises a switch coupled to an input of the modulator amplifier circuit and configured to generate the modified compensated error signal responsive to the control signal associated with the transition between power modes. ### Claim 26 (depends on 24) The DC-DC voltage converter of claim 24, wherein the at least one switchable gain circuit comprises a multiplexer coupled to an output of the modulator amplifier circuit and configured to generate the modified compensated error signal responsive to the control signal associated with the transition between power modes. ### Claim 27 An electronic system, comprising: a digital processor; a peripheral subsystem coupled to the digital processor; and a power subsystem coupled to the digital processor and circuit components of the peripheral subsystem and configured to generate an output voltage to power the digital processor and the circuit components of the peripheral subsystem, wherein the power subsystem includes a DC-DC controller configured to regulate the output voltage of the power subsystem, and the DC-DC controller includes a buck-boost converter comprising: a buck power stage; a boost power stage; an error amplifier circuit coupled to the boost power stage, the error amplifier circuit configured to receive an output signal from the boost power stage and generate a compensated error signal associated with the output signal; a variable gain circuit coupled to the error amplifier circuit and configured to receive the compensated error signal, generate a modified compensated error signal for at least one power mode of operation of the buck-boost converter, and output the modified compensated error signal for the at least one power mode of operation responsive to a transition between power modes; a pulse-width-modulated (PWM) signal generator circuit coupled to the variable gain circuit and configured to receive the modified compensated error signal responsive to the transition between modes, and output a PWM signal based on a comparison of the modified error signal with a signal representative of an output current of the buck-boost converter; and a logic circuit coupled to the PWM signal generator circuit and configured to receive the PWM signal and the output voltage and an input voltage of the buck-boost converter, and generate a first PWM signal to drive the buck power stage, a second PWM signal to drive the boost power stage, and a mode control signal. ### Claim 28 (depends on 27) The electronic system of claim 27, wherein the buck-boost converter and the power subsystem are formed on one or more integrated circuits, wafers, chips or dies. ### Claim 29 (depends on 27) The electronic system of claim 27, wherein the digital processor comprises a microprocessor or a microcontroller formed on an integrated circuit. ### Claim 30 (depends on 27) The electronic system of claim 27, wherein the power subsystem comprises a power management integrated circuit (PMIC).