US 9,871,131 B2Granted

Semiconductor device with insulating section of varying thickness

AssigneeKabushiki Kaisha Toshiba

InventorKenya Kobayashi

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Abstract

A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type on the first semiconductor region, a first electrode surrounded by the first semiconductor region and including a first electrode portion and a second electrode portion provided on the first electrode portion, and a first insulating section including first and second insulating portions. The second insulating portion is arranged side by side with the second electrode portion in a second direction perpendicular to a first direction from the first semiconductor region to the second semiconductor region. The first insulating portion is arranged side by side with the first electrode portion in the second direction. A length and a thickness of the first insulating portion in the first direction are greater than a length and a thickness of the second insulating portion in the first direction, respectively.

Claims20

Dependent claims

A semiconductor device comprising:

a first semiconductor region of a first conductivity type;
a second semiconductor region of a second conductivity type provided on the first semiconductor region;
a third semiconductor region of the first conductivity type selectively provided on the second semiconductor region;
a first electrode surrounded by the first semiconductor region, the first electrode including
a first electrode portion including a first end of the first electrode in a first direction from the first semiconductor region to the second semiconductor region, and
a second electrode portion provided on the first electrode portion;
a first insulating section provided between the first electrode and the first semiconductor region, the first insulating section including
a second insulating portion arranged side by side with the second electrode portion in a second direction perpendicular to the first direction, and
a first insulating portion arranged side by side with the first electrode portion in the second direction, a length of the first insulating portion in the first direction being greater than a length of the second insulating portion in the first direction, and a thickness of the first insulating portion in the second direction being greater than a thickness of the second insulating portion in the second direction;
a gate electrode provided on a second end of the first electrode opposite the first end in the first direction such that a width of the gate electrode in the second direction is approximately equal to a width of the first electrode portion in the second direction;
and
a gate insulating section provided between the gate electrode and the second semiconductor region.

9 more elements

A semiconductor device comprising:

a first semiconductor region of a first conductivity type;
a second semiconductor region of a second conductivity type provided on the first semiconductor region;
a third semiconductor region of the first conductivity type selectively provided on the second semiconductor region;
a fourth semiconductor region of the second conductivity type selectively provided on the second semiconductor region;
a first electrode surrounded by the first semiconductor region;
a first insulating section provided between the first electrode and the first semiconductor region;
a gate electrode provided on one end portion of the first electrode in a first direction from the first semiconductor region to the second semiconductor region, a width of the gate electrode in a second direction perpendicular to the first direction being approximately equal to a width of another end portion of the first electrode in the second direction, the another end portion being opposite the one end portion in the first direction;
a gate insulating section provided between the gate electrode and the second semiconductor region, a thickness of the gate insulating section in the second direction being less than a thickness of the first insulating section in the second direction;
and
a source electrode provided on the third semiconductor region and the fourth semiconductor region and electrically connected to the third semiconductor region and the fourth semiconductor region.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/251,805Filed 30 Aug 2016
Priority: JP 2016-0456349 Mar 2016
Published: US 2017/0263752 A114 Sep 2017
Granted: 16 Jan 2018
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H10D 30/665
Vertical dmos [vdmos] fets: having edge termination structures
H10D 30/0297
Of vertical dmos [vdmos] fets: using recessing of the gate electrodes, e.g. to form trench gate electrodes
H10D 30/668
Vertical dmos [vdmos] fets: having trench gate electrodes, e.g. UMOS transistors
H10D 62/127
Top-view geometrical layouts of the regions or the junctions: of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs