Field effect transistor and manufacturing method thereof
AssigneeUnited Microelectronics Corp.
InventorsTong-Yu Chen, Chih-Jung Wang
Life of this patent
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Abstract
A field effect transistor (FET) and a manufacturing method thereof are provided. The FET includes a substrate, a fin bump, an insulating layer, a charge trapping structure and a gate structure. The fin bump is disposed on the substrate. The insulating layer is disposed on the substrate and located at two sides of the fin bump. The charge trapping structure is disposed on the insulating layer and located at least one side of the fin bump. A cross-section of the charge trapping structure is L-shaped. The gate structure covers the fin bump and the charge trapping structure.
Claims10
A manufacturing method of a field effect transistor, comprising:
- providing a substrate;
- forming a fin bump on the substrate;
- forming an insulating layer on the substrate, the insulating layer being located at two sides of the fin bump;
- disposing a charge trapping material on the fin bump and the substrate;
- etching part of the charge trapping material covering the fin bump to expose part of the fin bump;
- forming a gate structure covering the fin bump and the charge trapping material;
- and
- etching the charge trapping material by using the gate structure as a mask to form a charge trapping structure, wherein the charge trapping structure is disposed on the insulating layer and located at least one side of the fin bump, a cross-section of the charge trapping structure is L-shaped, the charge trapping structure covers part of the lateral wall of the fin bump, a top of the charge trapping structure is lower than a top of the fin bump and higher than a bottom of the fin bump, and none of the charge trapping structure is on the top of the fin bump.
Dependencies are inferred from the claim text.