Doped poly-silicon for polyCMP planarity improvement

A method of manufacturing a semiconductor device, the method comprising:

• depositing a polysilicon layer over a substrate, the substrate having a first region with a first pattern density that is larger than a second pattern density of a second region of the substrate, the polysilicon layer having an uneven upper surface;
• doping a top portion of the polysilicon layer to form a doped polysilicon layer over an undoped polysilicon layer, the doped polysilicon layer having a removal rate slower than that of the undoped polysilicon layer below the doped polysilicon layer;
• removing a first region of the doped polysilicon layer to expose a first portion of the undoped polysilicon layer while leaving a second region of the doped polysilicon layer covering a second portion of the undoped polysilicon layer;
• removing the exposed first portion of the undoped polysilicon layer at a first removal rate and the second region of the doped polysilicon layer at a second removal rate until the second portion of the undoped polysilicon layer is exposed;
• and
• removing the first and the second portions of the undoped polysilicon layer at a third removal rate and a fourth removal rate, respectively.

A method of manufacturing a semiconductor device, the method comprising:

• forming a polysilicon layer over a substrate, the polysilicon layer having an uneven upper surface, the substrate has a first pattern density in a first region of the substrate and a second pattern density in a second region of the substrate, the second pattern density being smaller than the first pattern density;
• doping the polysilicon layer with carbon or boron to form a first polysilicon layer over a second polysilicon layer, the first polysilicon layer having a higher dopant concentration of carbon or boron than the second polysilicon layer;
• removing a first portion of the first polysilicon layer to expose a first portion of the second polysilicon layer and leaving a second portion of the second polysilicon layer covered by a second portion of the first polysilicon layer;
• removing the first portion of the second polysilicon layer at a first removal rate and the second portion of the first polysilicon layer at a second removal rate smaller than the first removal rate until the second portion of the second polysilicon layer is exposed;
• and
• removing the first portion of the second polysilicon layer at a third removal rate and the second portion of the second polysilicon layer at a fourth removal rate larger than the third removal rate;
• and
• stopping removal of the second polysilicon layer once the first and the second portions of the second polysilicon layer have a coplanar upper surface.