Semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorsHo Jun Kim, Sung Dae Suk
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a plurality of active regions including channel regions extending in a first direction on a semiconductor substrate and source/drain regions connected to the channel regions, a plurality of gate electrodes extending in a second direction different from the first direction to intersect the channel regions, a plurality of conductive lines electrically connected to at least one of the source/drain regions and the plurality of gate electrodes through a plurality of vias, and a power line disposed between the semiconductor substrate and the plurality of conductive lines and configured to supply a power supply voltage.
Claims19
A semiconductor device comprising:
- a plurality of active regions including channel regions extending in a first direction on a semiconductor substrate and source/drain regions connected to the channel regions;
- a plurality of gate electrodes extending in a second direction different from the first direction to intersect the channel regions;
- a plurality of contacts that is disposed in a layer and is connected to at least one of the source/drain regions and the gate electrodes;
- and
- a power line that is disposed in the layer in which at least one of the plurality of contacts is disposed, and is configured to supply a power voltage,
- wherein the power line is laterally connected to at least one of the plurality of contacts in the layer.
A semiconductor device comprising:
- a plurality of active regions including channel regions extending in a first direction on a semiconductor substrate, and source/drain regions connected to the channel regions in a layer;
- a plurality of gate electrodes extending in a second direction different from the first direction to intersect the channel regions;
- a plurality of contacts disposed on the active regions and the gate electrodes, and connected to at least one of the source/drain regions and the gate electrodes;
- and
- a power line that is disposed in the layer in which at least one of the source/drain regions is disposed, and is configured to supply a power voltage,
- wherein the power line is laterally connected to at least one of the source/drain regions in the layer.
An integrated circuit device, comprising:
- a first layer comprising active regions and gate electrodes intersecting therein, the active regions comprising source/drain regions therein and channel regions extending therebetween;
- a second layer stacked on the first layer, the second layer comprising source/drain contacts therein on the source/drain regions and gate contacts therein on the gate electrodes;
- and
- a third layer stacked on the second layer, the third layer comprising a plurality of conductive lines,
- wherein the second layer further comprises at least one power line extending therein in a first direction, and
- wherein a side surface of the at least one power line is continuous with a side surface of the source/drain contacts and the at least one power line is configured to provide a power supply voltage thereto.
Dependencies are inferred from the claim text.