Resistive memory device with semiconductor ridges

A memory device comprising:

• one or more first ridges formed on a first semiconductor wafer, wherein the first ridges are formed using a semiconductor material and are configured to be first electrodes;
• one or more second ridges that are placed orthogonally on top of the first semiconductor ridges forming a crossbar structure, with sharp edges of the first ridges coupled to sharp edges of the second ridges, wherein the second ridges are configured to be second electrodes and each area of coupling of a first ridge and a second ridge is configured to be a memory cell;
• and
• a compound layer covering the sharp edges of at least one of the first ridges or the second ridges, wherein the compound layer is configured to be a switching layer,
• wherein a resistance of the switching layer corresponding to a first memory cell is configured to be in a first state by applying a first set of voltages to a first ridge and a second ridge associated with the first memory cell and the resistance of the switching layer is configured to be in a second state by applying a second set of voltages to the first ridge and the second ridge associated with the first memory cell,
• wherein the first memory cell is configured to store a first value when the resistance of the switching layer is in the first state and the first memory cell is configured to store a second value when the resistance of the switching layer is in the second state.