Vertical-type memory device

A vertical-type memory device comprising:

• a channel layer vertically extending on a substrate;
• a gate insulation layer at a side of the channel layer, the gate insulation layer vertically extending on the substrate;
• an etch control layer at a side of the gate insulation layer, the etch control layer extending horizontally with respect to the substrate and separated vertically with respect to the substrate by a first opening;
• a first replacement gate electrode in the first opening under the etch control layer;
• a plurality of interlayer insulation layers stacked on the etch control layer vertically with respect to the substrate, and separate from each other due to a plurality of second openings;
• and
• a second replacement gate electrode in each of the plurality of second openings.

A vertical-type memory device, comprising:

• a channel layer vertically extending on a substrate;
• a pad insulation material layer on the substrate;
• an etch control layer above the pad insulation material layer;
• a gate insulation layer at a side of the channel layer, the gate insulation layer vertically extending on a wall of the etch control layer and horizontally extending into a recess between the etch control layer and the pad insulation material layer;
• and
• a first replacement gate electrode on a wall of the gate insulation layer between the etch control layer and the pad insulation material layer.