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US 9,871,046 B2Granted
SRAM circuits with aligned gate electrodes
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsFang Chen, Jhon Jhy Liaw, Min-Chang Liang, Ren-Fen Tsui, Shih-Chi Fu, Yen-Huei Chen
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Abstract
A device includes a Static Random Access Memory (SRAM) array, and an SRAM cell edge region abutting the SRAM array. The SRAM array and the SRAM cell edge region in combination include first gate electrodes having a uniform pitch. A word line driver abuts the SRAM cell edge region. The word line driver includes second gate electrodes, and the first gate electrodes have lengthwise directions aligned to lengthwise directions of respective ones of the second gate electrodes.
Claims20
A device comprising:
- a Static Random Access Memory (SRAM) array;
- an SRAM cell edge region abutting the SRAM array, wherein the SRAM array and the SRAM cell edge region in combination comprise first gate electrodes having a uniform pitch;
- and
- a word line driver abutting the SRAM cell edge region, wherein the word line driver comprises second gate electrodes, and the first gate electrodes have lengthwise directions aligned to lengthwise directions of respective ones of the second gate electrodes, and wherein first portions of the first gate electrodes are physically connected to second portions of the second gate electrodes.
1 more element
A device comprising:
- a Static Random Access Memory (SRAM) array comprising a plurality of SRAM cells;
- an SRAM cell edge region abutting the SRAM array, wherein the SRAM array and the SRAM cell edge region in combination comprise first gate electrodes having a uniform pitch, and the first gate electrodes comprise a first boundary gate electrode;
- and
- an Input-Output (IO) block comprising second gate electrodes parallel to the first gate electrodes and having the uniform pitch, wherein the second gate electrodes comprise a second boundary gate electrode immediately neighboring the first boundary gate electrode, and the first boundary gate electrode and the second boundary gate electrode have a pitch equal to the uniform pitch.
1 more element
A device comprising:
- a Static Random Access Memory (SRAM) array comprising first gate electrodes having a uniform pitch, wherein the first gate electrodes comprise a first boundary gate electrode;
- a word line driver abutting the SRAM array, wherein the word line driver comprises second gate electrodes, and the first gate electrodes have lengthwise directions aligned to lengthwise directions of respective ones of the second gate electrodes;
- and
- an Input-Output (IO) block comprising third gate electrodes parallel to the first gate electrodes and having the uniform pitch, wherein the third gate electrodes comprise a second boundary gate electrode immediately neighboring the first boundary gate electrode, and a pitch of the first boundary gate electrode and the second boundary gate electrode is equal to a pitch of two neighboring ones of the first gate electrodes.
1 more element
Dependencies are inferred from the claim text.