Semiconductor device including fin structures and manufacturing method thereof

A semiconductor device, comprising:

• a first device area in which a first fin field effect transistor (Fin FET) is disposed;
• a second device area in which a second Fin FET is disposed;
• and
• a non-device area which is disposed between the first and second device areas and includes a dummy structure, wherein:
• each of the first and second Fin FETs includes:
• a fin structure having a well region including a first semiconductor layer, a stressor region including a second semiconductor layer and a channel region including a third semiconductor layer;
• an isolation region in which the well region is embedded, and from which at least an upper port of the channel region is exposed;
• and
• a gate structure disposed over a part of the fin structure, and the dummy structure in the non-device area includes:
• a first dummy layer formed over the first semiconductor layer and made of a different material from the stressor region;
• and
• a second dummy layer formed over the first dummy layer and made of a different material from the channel region.

A semiconductor device, comprising:

• two fin structures, each of which has a well region made of a first semiconductor material, a stressor region made of a second semiconductor material and a channel region made of a third semiconductor material;
• an isolation region in which the well region is embedded, and from which at least an upper port of the channel region is exposed, the isolation region being disposed between the two fin structures;
• and
• a gate structure disposed over a part of the two fin structures, wherein:
• an interface between the stressor region and the well region is located below an upper surface of the isolation region.