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US 9,871,032 B2Granted
Gate-grounded metal oxide semiconductor device
AssigneeGlobalfoundries Singapore Pte. Ltd.
InventorsEng Huat Toh, Kiok Boone Elgin Quek
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Abstract
A gate-grounded metal oxide semiconductor (GGMOS) device is disclosed. The GGMOS is an n-type (GGNMOS) transistor used as an electrostatic discharge (ESD) protection device. The GGMOS includes a base extension region under an elevated source. The elevated source and base extension regions increase Leff and reduce beta, increasing performance of the ESD protection.
Claims20
A method of forming a device comprising:
- providing a substrate with a device region;
- forming a gate on the substrate in the device region;
- forming a base extension region having second polarity type dopants adjacent to a second side of the gate;
- forming first and second source/drain (S/D) regions, wherein the first and second S/D regions comprise first polarity type dopants, the first and second S/D regions are disposed adjacent to first and second sides of the gate respectively, wherein forming the second S/D region comprises forming an elevated second S/D region on the substrate and disposed over the base extension region;
- and
- forming interconnections between the second S/D region and gate with ground to form a gate-grounded metal oxide semiconductor (GGMOS) device.
3 more elements
A method of forming a device comprising:
- providing a substrate with a device region;
- forming a gate on the substrate in the device region;
- forming an elevated base extension region having second polarity type dopants adjacent to a second side of the gate, wherein forming the elevated base extension region comprises
- forming a base extension epitaxial layer on the device region adjacent to the second side of the gate, and
- doping the base extension epitaxial layer with second polarity type dopants;
- forming first and second source/drain (S/D) regions, wherein the first and second S/D regions comprise first polarity type dopants, the first and second S/D regions are disposed adjacent to first and second sides of the gate respectively, wherein forming the second S/D region comprises forming an elevated second S/D region on the substrate and disposed over the elevated base extension region;
- and
- forming interconnections between the second S/D region and gate with ground to form a gate-grounded metal oxide semiconductor (GGMOS) device.
5 more elements
A GGMOS device comprising:
- a substrate with a device region;
- a gate having first and second sides disposed on the substrate;
- a base extension region comprising second polarity type dopants disposed adjacent to the second side of the gate;
- a first S/D region disposed adjacent to the first side of the gate;
- and
- an elevated second S/D region on the substrate and disposed adjacent to the second side of the gate over the base extension region, where the first and second S/D regions comprise first polarity type dopants;
- and
- an interconnection connecting the second S/D region and the gate to ground.
5 more elements
A method of forming a GGMOS device comprising:
- providing a substrate with a device region;
- forming a gate on the substrate in the device region, the gate having first and second sides;
- forming a base extension region having second polarity type dopants adjacent to the second side of the gate;
- forming first and second S/D regions adjacent to the first and second sides of the gate respectively, wherein the first and second S/D regions comprise first polarity type dopants, wherein forming the second S/D region comprises forming an elevated second S/D region on the substrate which includes forming a second S/D epitaxial layer in the device region adjacent to the second side of the gate over the base extension region;
- and
- forming interconnections between the second S/D region and the gate with ground.
3 more elements
Dependencies are inferred from the claim text.