Distributed on-chip decoupling apparatus and method using package interconnect

An integrated circuit (IC) chip comprising:

• power supply circuitry formed on the IC chip, the power supply circuitry coupled to a first group of vias;
• decoupling capacitance circuitry formed on the IC chip, the decoupling capacitance circuitry coupled to a second group of vias;
• and
• conductors connecting the first group of vias with the second group of vias, to indirectly establish conductivity between the power supply circuitry and the decoupling capacitance circuitry, the conductors formed by a back-end semiconductor process.

An integrated circuit (IC) memory controller comprising:

• power supply circuitry formed on the IC memory controller, the power supply circuitry coupled to a first group of vias;
• decoupling capacitance circuitry formed on the IC memory controller, the decoupling capacitance circuitry coupled to a second group of vias;
• and
• conductors connecting the first group of vias with the second group of vias.