FinFETs with nitride liners and methods of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsNeng-Kuo Chen, Gin-Chen Huang, Ching-Hong Jiang, Sey-Ping Sun, Clement Hsingjen Wann
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Abstract
An integrated circuit structure includes a semiconductor substrate, which includes a semiconductor strip. A Shallow Trench Isolation (STI) region is on a side of the semiconductor strip. The STI region includes a first portion comprising an oxide and a second portion free from oxide. The second portion separates the first portion from the semiconductor substrate. A semiconductor fin is over and aligned to the semiconductor strip, wherein the semiconductor fin is higher than a top surface of the STI region.
Claims19
A method comprising:
- etching a semiconductor substrate to form a first recess;
- forming a nitride liner lining a bottom and a sidewall of the first recess;
- forming an oxide region in the first recess and over the nitride liner;
- forming a nitride region to cover the oxide region, wherein the nitride region, the nitride liner, and the oxide region in combination form a Shallow Trench Isolation (STI) region, wherein before forming the nitride region, the oxide region is recessed to form a recessed oxide region, and the nitride region is formed over the recessed oxide region;
- recessing a semiconductor fin to form a second recess between opposing portions of the nitride liner;
- removing a top portion of the nitride region and a top portion of the nitride liner and
- performing an epitaxy to form a semiconductor re-growth region in the second recess, wherein the semiconductor re-growth region on a side and contacting the nitride liner is higher than the STI region.
A method comprising:
- etching a semiconductor substrate to form a first recess;
- forming a first nitride region lining a bottom and a sidewall of the first recess;
- forming an oxide region in the first recess and over the first nitride region;
- forming a second nitride region to cover the oxide region, wherein the second nitride region, the first nitride region, and the oxide region in combination form a Shallow Trench Isolation (STI) region, wherein before forming the second nitride region, the oxide region is recessed to form a recessed oxide region, and the second nitride region is formed over the recessed oxide region;
- recessing a semiconductor fin to form a second recess between opposing portions of the first nitride region;
- removing a top portion of the second nitride region and a top portion of the first nitride region and
- performing an epitaxy to form a semiconductor re-growth region in the second recess, wherein the semiconductor re-growth region on a side and contacting the first nitride region has a top surface that is higher than a top surface of the STI region.
A method comprising:
- forming a first recess in a semiconductor substrate;
- lining a bottom surface and a sidewall surface of the first recess with a first nitride region;
- depositing an oxide region in the first recess and over the first nitride region;
- forming a second nitride region over the oxide region, wherein the second nitride region, the first nitride region, and the oxide region in combination form a Shallow Trench Isolation (STI) region, wherein before forming the second nitride region, the oxide region is recessed to form a recessed oxide region, and the second nitride region is formed over the recessed oxide region;
- recessing an upper-most portion of the semiconductor substrate to form a second recess between opposing portions of the first nitride region;
- and
- epitaxially forming a semiconductor fin in the second recess, wherein the semiconductor fin is higher than an upper-most surface of the STI region.
Dependencies are inferred from the claim text.