SRAM module and writing control method thereof
AssigneeM31 Technology Corporation
InventorsNan-Chun Lien, David C. Yu
Life of this patent
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Abstract
A SRAM module and a writing control method of the SRAM module are disclosed. The writing control method of the SRAM module is applied to a SRAM module that includes a plurality of memory cells and a bit line. The method includes: providing a first voltage as a supply voltage of the plurality of memory cells during a data retention time; decreasing a first voltage level corresponding to the data retention time of the memory cells to a second voltage level by discharging the memory cells; and performing a write process to the memory cells through the bit line. The discharge time from the first voltage level to the second voltage level is related to the number of the memory cells.
Claims20
An SRAM module having a plurality of memory cells, comprising:
- a bit line, coupled to the memory cells, for transmitting a write data;
- a detecting unit, coupled to the memory cells, for generating a control signal by detecting a voltage change on the memory cells:
- a capacitor, coupled to the bit line;
- and
- a charge unit, coupled to the detecting unit and the capacitor, for charging the capacitor according to the control signal;
- wherein, after the capacitor is charged, a voltage difference at the two ends of the capacitor is used to cause a voltage drop on the bit line, and
- wherein the memory cells from an equivalent capacitor, which has a terminal voltage, and the detecting unit changes a level of the control signal by detecting a change in the terminal voltage so as to activate the charge unit to charge the capacitor.
A method of controlling an SRAM module having a plurality of memory cells, comprising:
- generating a control signal by detecting a voltage change on the memory cells;
- charging a capacitor that is coupled to a bit line according to the control signal, wherein the bit line is further coupled to the memory cells;
- and using a voltage difference at two ends of the capacitor to cause a voltage drop on the bit line after the capacitor is charged, and
- wherein the memory cells form an equivalent capacitor having a terminal voltage, and the step of generating the control signal comprises:
- changing a level of the control signal by detecting a change in the terminal voltage so as to charge the capacitor.
Dependencies are inferred from the claim text.