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US 9,870,814 B2Granted
Refreshing a group of memory cells in response to potential disturbance
AssigneeHewlett Packard Enterprise Development LP
InventorDarel N. Emmot
Life of this patent
Estimating the term…
Abstract
A detection circuit is provided for a particular group of memory cells in a memory device, where the detection circuit is to be updated in response to at least one access of data and at least one neighboring group of memory cells. The particular group of memory cells is refreshed in response to an indication from the detection circuit, where the indication indicates presence of potential disturbance of the particular group of memory cells.
Claims20
An apparatus for use with a memory device, comprising:
- a detection circuit for a particular group of memory cells in the memory device, the detection circuit to:
- change from a first state to a second state in response to at least one access of data in at least one neighboring group of memory cells;
- in response to changing from the first state to the second state, change an indication from a first state to a second state, the first state of the indication indicating no disturbance of the particular group of memory cells, and the second state of the indication indicating presence of potential disturbance of the particular group of memory cells;
- and
- output the indication to a refresh controller;
- and
- the refresh controller to cause a refresh of the particular group of memory cells in response to the indication from the detection circuit changing from the first state to the second state.
4 more elements
A method of disturbance management in a memory device, comprising:
- updating a detection circuit for a particular group of memory cells of the memory device in response to accesses of data in a set of neighboring groups associated with the particular group;
- activating, by the detection circuit, a disturbance indication in response to presence of potential disturbance of the particular group of memory cells detected by the detection circuit;
- and
- performing a refresh of the particular group of memory cells in response to the disturbance indication.
1 more element
A system comprising:
- a requesting device;
- a memory controller;
- and
- a memory device, the memory controller to manage access of the memory device in response to a request from the requesting device, the memory device comprising:
- a detection circuit for a particular group of memory cells in the memory device, the detection circuit to:
- change from a first state to a second state in response to at least one access of data in at least one neighboring group of memory cells;
- in response to changing from the first state to the second state, change an indication from a first state to a second state, the first state of the indication indicating no disturbance of the particular group of memory cells, and the second state of the indication indicating presence of potential disturbance of the particular group of memory cells;
- and
- output the indication to a refresh controller;
- and
- the refresh controller to cause a refresh of the particular group of memory cells in response to the indication from the detection circuit changing from the first state to the second state.
8 more elements
Dependencies are inferred from the claim text.