Techniques and architecture for improved vertex processing
AssigneeIntel Corporation
InventorsRahul P. Sathe, Tim Foley
Life of this patent
Estimating the term…
Abstract
An apparatus may include an index buffer to store an index stream having a multiplicity of index entries corresponding to vertices of a mesh and a vertex cache to store a multiplicity of processed vertices of the mesh. The apparatus may further include a processor circuit, and a vertex manager for execution on the processor circuit to read a reference bitstream comprising a multiplicity of bitstream entries, each bitstream entry corresponding to an index entry of the index stream, and to remove a processed vertex from the vertex cache when a value of the reference bitstream entry corresponding to the processed vertex is equal to a defined value.
Claims22
An apparatus, comprising:
- a. an index buffer to store an index stream having a multiplicity of index entries corresponding to vertices of a mesh;
- b. a vertex cache to store a multiplicity of processed vertices of the mesh;
- c. a processor circuit;
- and
- d. a vertex manager for execution on the processor circuit to read a reference bitstream comprising a multiplicity of reference bitstream entries, each reference bitstream entry corresponding to an index entry of the index stream and each reference bitstream entry to indicate whether a vertex is subsequently referenced during assembly of the mesh, and to remove a processed vertex from the vertex cache when a value of the reference bitstream entry corresponding to the processed vertex is equal to a defined value, the vertex manager to send a processed vertex for primitive assembly without storing the processed vertex in the vertex cache when the reference bitstream entry is equal to the defined value and the processed vertex is not presently in the vertex cache.
At least one non-transitory computer-readable storage medium comprising instructions that, when executed, cause a system to:
- a. read an index stream from an index buffer having a multiplicity of index entries corresponding to vertices of a mesh;
- b. read a reference bitstream comprising a multiplicity of bitstream entries, each bitstream entry corresponding to an index entry of the index stream and each reference bitstream entry to indicate whether a vertex is subsequently referenced during assembly of the mesh;
- c. send a signal to remove a processed vertex from a vertex cache when a value of the reference bitstream entry corresponding to the processed vertex is equal to a defined value;
- and
- send a processed vertex for primitive assembly without storing the processed vertex in the vertex cache when the reference bitstream entry is equal to the defined value and the processed vertex is not presently in the vertex cache.
A computer implemented method, comprising:
- a. storing in an index buffer an index stream having a multiplicity of index entries corresponding to vertices of a mesh;
- b. reading a reference bitstream comprising a multiplicity of bitstream entries, each bitstream entry corresponding to an index entry of the index stream and each reference bitstream entry to indicate whether a vertex is subsequently referenced during assembly of the mesh;
- c. removing a processed vertex from the vertex cache when a value of the reference bitstream entry corresponding to the processed vertex is equal to a defined value;
- and
- sending a processed vertex for primitive assembly without storing the processed vertex in the vertex cache when the reference bitstream entry is equal to the defined value and the processed vertex is not presently in the vertex cache.
Dependencies are inferred from the claim text.