Memory reduction method for fixed point matrix multiply
AssigneeQUALCOMM Incorporated
InventorsMatthew Leslie Badin, Nathan Whitehead
Life of this patent
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Abstract
Embodiments include computing devices, apparatus, and methods implemented by the apparatus for memory reduction for fixed point matrix multiply on a computing device. The computing device may implement a partial matrix multiplication using a first block of fixed point data of a first matrix and a second block of fixed point data of a second matrix using full precision resulting in a first intermediate result. The computing device may down convert the first intermediate result by converting fixed point data of the first intermediate result to fixed point data using lower precision resulting in a first down converted intermediate result.
Claims30
A method of memory reduction for fixed point matrix multiply on a computing device, comprising:
- determining a largest representable size of a down converted intermediate result configured to use less memory than an intermediate result;
- implementing a partial matrix multiplication using a first block of fixed point data of a first matrix and a second block of fixed point data of a second matrix using full precision resulting in a first intermediate result, wherein the first block represents a first portion of at least one complete row of the first matrix and the second block represents a second portion of at least one complete column of the second matrix;
- down converting the first intermediate result by converting fixed point data of the first intermediate result to fixed point data using lower precision equal in size to or smaller than the largest representable size resulting in a first down converted intermediate result;
- storing the first down converted intermediate result;
- implementing a partial matrix multiplication using a third block of fixed point data of the first matrix and a fourth block of fixed point data of the second matrix using full precision resulting in a second intermediate result, wherein the third block represents a third portion of the at least one complete row of the first matrix and the fourth block represent a fourth portion of the at least one complete column of the second matrix;
- down converting the second intermediate result by converting fixed point data of the second intermediate result to fixed point data using lower precision equal in size to or smaller than the largest representable size resulting in a second down converted intermediate result;
- and
- adding the first down converted intermediate result and the second down converted intermediate result.
A matrix multiply component configured for memory reduction for fixed point matrix multiply and configured to:
- determine a largest representable size of a down converted intermediate result configured to use less memory than an intermediate result;
- implement a partial matrix multiplication using a first block of fixed point data of a first matrix and a second block of fixed point data of a second matrix using full precision resulting in a first intermediate result, wherein the first block represents a first portion of at least one complete row of the first matrix and the second block represents a second portion of at least one complete column of the second matrix;
- down convert the first intermediate result by converting fixed point data of the first intermediate result to fixed point data using lower precision equal in size to or smaller than the largest representable size resulting in a first down converted intermediate result;
- store the first down converted intermediate result;
- implement a partial matrix multiplication using a third block of fixed point data of the first matrix and a fourth block of fixed point data of the second matrix using full precision resulting in a second intermediate result, wherein the third block represents a third portion of the at least one complete row of the first matrix and the fourth block represent a fourth portion of the at least one complete column of the second matrix;
- down convert the second intermediate result by converting fixed point data of the second intermediate result to fixed point data using lower precision equal in size to or smaller than the largest representable size resulting in a second down converted intermediate result;
- and
- add the first down converted intermediate result and the second down converted intermediate result.
A matrix multiply component configured for memory reduction for fixed point matrix multiply, comprising:
- means for determining a largest representable size of a down converted intermediate result configured to use less memory than an intermediate result;
- means for implementing a partial matrix multiplication using a first block of fixed point data of a first matrix and a second block of fixed point data of a second matrix using full precision resulting in a first intermediate result, wherein the first block represents a first portion of at least one complete row of the first matrix and the second block represents a second portion of at least one complete column of the second matrix;
- means for down converting the first intermediate result by converting fixed point data of the first intermediate result to fixed point data using lower precision equal in size to or smaller than the largest representable size resulting in a first down converted intermediate result;
- means for storing the first down converted intermediate result;
- means for implementing a partial matrix multiplication using a third block of fixed point data of the first matrix and a fourth block of fixed point data of the second matrix using full precision resulting in a second intermediate result, wherein the third block represents a third portion of the at least one complete row of the first matrix and the fourth block represent a fourth portion of the at least one complete column of the second matrix;
- means for down converting the second intermediate result by converting fixed point data of the second intermediate result to fixed point data using lower precision equal in size to or smaller than the largest representable size resulting in a second down converted intermediate result;
- and
- means for adding the first down converted intermediate result and the second down converted intermediate result.
A non-transitory processor-readable storage medium having stored thereon processor-executable instructions configured to cause a processor of a computing device to perform operations comprising:
- determining a largest representable size of a down converted intermediate result configured to use less memory than an intermediate result;
- implementing a partial matrix multiplication using a first block of fixed point data of a first matrix and a second block of fixed point data of a second matrix using full precision resulting in a first intermediate result, wherein the first block represents a first portion of at least one complete row of the first matrix and the second block represents a second portion of at least one complete column of the second matrix;
- down converting the first intermediate result by converting fixed point data of the first intermediate result to fixed point data using lower precision equal in size to or smaller than the largest representable size resulting in a first down converted intermediate result;
- storing the first down converted intermediate result;
- implementing a partial matrix multiplication using a third block of fixed point data of the first matrix and a fourth block of fixed point data of the second matrix using full precision resulting in a second intermediate result, wherein the third block represents a third portion of the at least one complete row of the first matrix and the fourth block represent a fourth portion of the at least one complete column of the second matrix;
- down converting the second intermediate result by converting fixed point data of the second intermediate result to fixed point data using lower precision equal in size to or smaller than the largest representable size resulting in a second down converted intermediate result;
- and
- adding the first down converted intermediate result and the second down converted intermediate result.
Dependencies are inferred from the claim text.