Implementing sideband control structure for PCIE cable cards and IO expansion enclosures

A method for implementing sideband control structure for Peripheral Component Interconnect Express (PCIE) cable cards and input/output (IO) expansion enclosures in a computer system, comprising:

• providing a Central Electronics Complex (CEC) including a processor and system firmware for uniquely identifying a cable card present in a PCIE slot in a system unit;
• providing the cable card including control and status registers accessible to said system firmware, a system unit link engine, a system unit wire engine and a system unit data engine;
• providing an IO enclosure including corresponding control and status registers, a corresponding link engine, a corresponding wire engine and a corresponding data engine;
• providing a respective first PCIE cable connector connected to a respective second PCIE cable connector by a respective pair of PCIE cables connecting between the cable card and the IO enclosure;
• providing sideband control signaling for implementing enclosure and PCIE link management functions utilizing sideband control paths integrated within the respective pair of PCIE cables, and providing PCIE signaling lanes within the respective pair of PCIE cables and each cable of the respective pair of PCIE providing an alternative signaling path for communicating sideband controls;
• said system unit wire engine, transmitting control and status signals over the PCIE cables to both said corresponding wire engine and data engine in the IO enclosure, and said system unit data engine, transmitting command and response messages and data for management communications between said system firmware and a management controller firmware within the IO enclosure;
• and
• said wire engine and data engine in the IO enclosure, receiving control signals from and providing status to said system unit wire engine, and receiving command messages and data and transmitting response messages and data to said system unit data engine.