Data storage device and flash memory control method
AssigneeSilicon Motion, Inc.
InventorWen-Sheng Lin
Life of this patent
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Abstract
A flash memory control technology with high reliability. In a power recovery process, a microcontroller is configured to duplicate a last write page of a run-time write block of a flash memory and thereby generate a duplicated page in the run-time write block. The microcontroller is further configured use the mapping information accessed from the duplicated page in rebuilding a physical-to-logical address mapping table rather than the mapping information accessed from the last write page. The microcontroller is configured to maintain the physical-to-logical address mapping table on a random access memory for the run-time write block and is further configured to use the physical-to-logical address mapping table to update a logical-to-physical address mapping table maintained in the flash memory.
Claims12
A data storage device, comprising:
- a flash memory, providing a storage space that is divided into a plurality of physical blocks with each physical block further divided into a plurality of physical pages;
- and
- a control unit, comprising a microcontroller and a random access memory and coupled between a host and the flash memory,
- wherein:
- the microcontroller is configured to duplicate a last write page of a run-time write block between the plurality of physical blocks during a power recovery process and thereby generate a duplicated page in the run-time write block;
- the microcontroller is configured to use mapping information accessed from the duplicated page in rebuilding a physical-to-logical address mapping table rather than mapping information accessed from the last write page;
- the microcontroller is configured to maintain the physical-to-logical address mapping table on the random access memory for the run-time write block;
- the microcontroller is configured to update a logical-to-physical address mapping table in accordance with the physical-to-logical address mapping table, and the logical-to-physical address mapping table is maintained in the flash memory;
- and
- the microcontroller is configured to write dummy data into a next page with respect to the last write page during the power recovery process to make the next page with respect to the last write page a dummy page.
A flash memory control method, comprising:
- duplicating a last write page of a run-time write block between a plurality of physical blocks of a flash memory during a power recovery process and thereby generate a duplicated page in the run-time write block;
- using mapping information accessed from the duplicated page in rebuilding a physical-to-logical address mapping table rather than mapping information accessed from the last write page, wherein the physical-to-logical address mapping table is maintained on the random access memory for the run-time write block and is used in updating a logical-to-physical address mapping table maintained in the flash memory;
- and
- writing dummy data into a next page with respect to the last write page during the power recovery process to make the next page with respect to the last write page a dummy page.
Dependencies are inferred from the claim text.