High-speed debug port using standard platform connectivity

A method comprising:

• monitoring, by a debug port controller, operations of a processing device to determine whether the processing device is operating in a first mode or a second mode by accessing a debug status register storing a value to indicate one of the first mode or the second mode, wherein the value is received from an external tool coupled to a platform communication port;
• collecting, by the debug port controller, trace information comprising operating characteristics of the processing device;
• processing, by a display engine logic, display data for output to a display device;
• providing, by a display engine interface to a plurality of existing platform connectors, the display data from the display engine logic when the processing device is operating in the first mode as determined by the debug port controller;
• and
• providing, by the display engine interface to the plurality of existing platform connectors not including the platform communication port, the trace information from the debug port controller when the processing device is operating in the second mode as determined by the debug port controller.

A system comprising:

• a computing platform comprising a plurality of existing platform connectors and a processing device, the processing device comprising:
• a debug port controller to monitor operations of the processing device to determine whether the processing device is operating in a first mode or a second mode by accessing a debug status register storing a value to indicate one of the first mode or the second mode, wherein the value is received from an external tool coupled to a platform communication port, and to collect trace information comprising operating characteristics of the processing device;
• a display engine logic to process display data for output to a display device;
• and
• a display engine interface, the display engine interface to provide, to the plurality of existing platform connectors not including the platform communication port, the display data from the display engine logic when the processing device is operating in the first mode as determined by the debug port controller and the trace information from the debug port controller when the processing device is operating in the second mode as determined by the debug port controller;
• and
• a trace box, coupled to the computing platform through the plurality of existing platform connectors, to receive and store the trace information from the debug port controller.