Prioritising of instruction fetching in microprocessor systems
AssigneeMIPS Tech, LLC
InventorAndrew Webber
Life of this patent
Estimating the term…
Abstract
A method and a system are provided for prioritising the fetching of instructions for each of a plurality of executing instruction threads in a multi-threaded processor. Instructions come from at least one source of instructions. Each thread has a number of threads buffered for execution in an instruction buffer. A first metric for each thread is determined based on the number of instructions currently buffered. A second metric is then determined for each thread, this being an execution based metric. A priority order for the threads is determined from the first and second metrics, and an instruction is fetched from the source for the thread with the highest determined priority which is requesting an instruction.
Claims19
A method for prioritizing fetching of instructions in a multithreaded processor system, comprising:
- determining a first metric for each thread of a plurality of threads executing on said multithreaded processor system based on the number of instructions currently buffered for execution on that thread;
- determining a second metric for each thread respectively based on at least one execution parameter for that thread;
- determining a ranked priority order for the threads from the first and second metrics;
- and
- fetching an instruction for the thread with the highest determined priority in the ranked priority order from a source of instructions.
A system for prioritizing the fetching of instructions for each of a plurality of executing threads of instructions in a multithreaded processor system, comprising:
- a source of instructions;
- a plurality of instruction fetch units each associated with a respective one of each of said plurality of executing threads, each instruction fetch unit configured to issue a request to fetch an instruction from said source of instructions, for its associated thread;
- and
- a priority arbiter operatively coupled between said source of instructions and said plurality of instruction fetch units, said priority arbiter being configured to determine a priority among multiple simultaneously received requests from said instruction fetch units, by
- determining a first metric for each thread of a plurality of threads executing on said multithreaded processor system based on the number of instructions currently buffered for execution on that thread,
- determining a second metric for each thread respectively based on at least one execution parameter for that thread, and
- determining a ranked priority order for the threads from the first and second metrics;
- wherein said priority arbiter fetches an instruction from the source for the thread with the highest priority in the ranked priority order.
Dependencies are inferred from the claim text.