Information processing device including host device and semiconductor memory device having a block rearrangement to secure free blocks

A memory system comprising:

• a host device having a first semiconductor memory;
• and
• a semiconductor memory device capable of communicating with the host device, the semiconductor memory device having:
• a second semiconductor memory having a plurality of blocks, the blocks including a first block, a second block and a third block, each of the blocks being a unit of an erase operation of the second semiconductor memory, the second semiconductor memory being nonvolatile;
• and
• a controller circuit being capable of reading a valid first data from the first block and writing the first data to an area of the first semiconductor memory, the area having been designated by the host device for storing data from the semiconductor memory device, wherein:
• the controller circuit is capable of reading a valid second data from the second block and writing the second data to the area of the first semiconductor memory;
• and
• the controller circuit is capable of reading the first data and the second data from the area of the first semiconductor memory and writing the first data and the second data to the third block,
• wherein when a block rearrangement to secure free blocks is executed in the semiconductor memory device, the controller circuit reads the valid first data from the first block, writes the first data to an area of the first semiconductor memory, reads the valid second data from the second block, writes the second data to the area of the first semiconductor memory, reads the first data and second data from the area of the first semiconductor memory and writes the first data and the second data to the third block.