Device comprising programmable logic element

A device comprising:

• a first circuit;
• and
• a second circuit comprising:
• programmable logic elements;
• third circuits each comprising first and second transistors and a memory circuit comprising a magnetic tunnel junction element;
• and
• a fourth circuit comprising a third transistor, one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the second transistor,
• wherein the second circuit is configured to store configuration data to generate a signal for a testing operation of the first circuit and configured to operate as a memory of the first circuit after the testing operation,
• wherein the fourth circuit is configured to write the configuration data to the memory circuit through the first transistor to control conduction between the programmable logic elements and change contents of logic operations in the programmable logic elements,
• wherein the fourth circuit is configured to write data to the memory circuit through the first transistor and read the data from the memory circuit through the second transistor, and
• wherein the third transistor is turned on after the testing operation.

A device comprising:

• a first circuit;
• and
• a second circuit comprising:
• programmable logic elements;
• third circuits each comprising first and second transistors and a memory circuit comprising a magnetic tunnel junction element;
• and
• a driver circuit comprising a third transistor, one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the second transistor,
• wherein the second circuit is configured to store configuration data to generate a signal for a testing operation of the first circuit and configured to operate as a memory storing data of the first circuit after the testing operation,
• wherein the configuration data are input to and stored in the driver circuit one by one and are output from the driver circuit to the memory circuits through the first transistors simultaneously to change contents of logic operations in the programmable logic elements,
• wherein the data are input and stored in the driver circuit simultaneously and are output from the driver circuit to the memory circuits through the first transistors simultaneously and the data are read from the memory circuits through the second transistor, and
• wherein the third transistor is turned on after the testing operation.