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US 9,866,476 B2Granted
Parallel direction decode circuits for network-on-chip
AssigneeIntel Corporation
InventorsMark A. Anders, Gregory K. Chen, Himanshu Kaul
Life of this patent
Estimating the term…
Abstract
A first packet and a first direction associated with the first packet are received. The first packet is forwarded to an output port of a plurality of output ports of the first router based on the first direction associated with the first packet. A second direction associated with the first packet is determined. The second direction is based at least on an address of the first packet. The first packet and the second direction are forwarded through the output port of the first router to a second router.
Claims20
A processor comprising:
- a first router comprising:
- a plurality of input ports to receive packets;
- a plurality of output ports to forward packets, an output port of the plurality of output ports comprising:
- priority logic to select a packet from multiple packets to forward;
- and
- direction logic to determine, for a packet of the multiple packets, a direction associated with the packet, wherein the direction logic is to perform the direction determination, at least in part, in parallel with the selection of the packet by the priority logic.
3 more elements
An apparatus comprising:
- a first router operable to:
- receive a first packet and a first direction associated with the first packet;
- forward the first packet to an output port of a plurality of output ports of the first router based on the first direction associated with the first packet;
- determine a second direction associated with the first packet, the second direction based at least on an address of the first packet;
- and
- forward the first packet and the second direction through the output port of the first router to a second router.
3 more elements
A method comprising:
- receiving a first packet and a first direction associated with the first packet;
- forwarding the first packet to an output port of a plurality of output ports of a first router based on the first direction associated with the first packet;
- determining a second direction associated with the first packet, the second direction based at least on an address of the first packet;
- and
- forwarding the first packet and the second direction through the output port of the first router to a second router.
2 more elements
A system comprising:
- a plurality of cores;
- a plurality of routers implementing a network on a chip, a router of the plurality of routers comprising:
- a core input port to receive packets from a core of the plurality of cores;
- a plurality of input ports, an input port of the plurality of input ports to receive packets from a router of the plurality of routers;
- a core output port to forward packets to the core of the plurality of cores;
- a plurality of output ports, an output port of the plurality of output ports to forward packets to a router of the plurality of routers, the output port to comprise:
- priority logic to select a packet from multiple packets to forward;
- and
- direction logic to determine, for a packet of the multiple packets, a direction associated with the packet, wherein the direction logic is to perform the direction determination, at least in part, in parallel with the selection of the packet by the priority logic.
6 more elements
Dependencies are inferred from the claim text.