Appapatus and method for fast conversion, compact, ultra low power, wide supply range auxiliary digital to analog converters
AssigneeIpgreat Incorporated
InventorsYuan-Ju Chao, Ta-Shun Chu
Life of this patent
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Abstract
A data converter includes a single-end capacitive digital to analog converter (DAC); a transconductance (GM) buffer having an output, a positive input coupled to the DAC and a negative input coupled to the output; a resistor and a capacitor load in parallel coupled to the output at one terminal and to ground at the other terminal. The developed architecture of comprising single end capacitive DAC and GM-based buffer provides fast conversion rate, low current consumption, small silicon area and wide supply range for general-purpose auxiliary DAC applications.
Claims16
A data converter, comprising:
- a single-end capacitive digital to analog converter (DAC);
- a transconductance (GM) buffer having an output, a positive input coupled to the DAC and a negative input coupled to the output and an input range from ground to supply;
- a resistor and a capacitor in parallel coupled to the output at one terminal and to ground at the other terminal.
A method for performing digital to analog conversion, comprising:
- providing a single-end capacitive digital to analog converter (DAC);
- buffering the output of the capacitive DAC with a transconductance (GM) buffer;
- using the GM buffer to cover an input range from ground to supply;
- and
- driving a load comprising a resistor coupled to the output at one terminal and to ground at the other terminal and a capacitor coupled to the output at one terminal and to ground at the other terminal.
A data converter, comprising:
- a single-end capacitive digital to analog converter (DAC);
- a transconductance (GM) buffer having an output, a positive input coupled to the DAC and a negative input coupled to the output;
- and
- a resistor and a capacitor in parallel coupled to the output at one terminal and to ground at the other terminal, and a differential input nodes, a direct current bias current generator, and a current mirror pair with a predetermined current ratio.
Dependencies are inferred from the claim text.