Digital to analog converter
AssigneeTexas Instruments Incorporated
InventorsZhang Jun, Zhang ZeFei, Su Anzhe, Hao Meng, Xianguang Wen, Xuan Wang
Life of this patent
Estimating the term…
Abstract
Digital to analog converters have first and second to analog arrays. The first digital to analog array has a reference input, a reference output, a first digital input that is connectable to a digital signal, and an analog output. The second digital to analog array includes a reference input, a reference output that is coupled to the reference input of the first digital to analog array, a plurality of switches coupled to the reference input, and a plurality of resistors coupled between the switches and the reference output.
Claims20
A digital to analog converter comprising:
- a first digital to analog array having a reference input, a reference output, a first digital input that is connectable to a digital signal, and an analog output;
- and
- a second digital to analog array comprising:
- a digital input;
- a reference input that is connectable to a first voltage source;
- a reference output that is coupled to the reference input of the first digital to analog array;
- a plurality of switches that are controlled by signals at the digital input, each switch having a first terminal and a second terminal, the first terminal of each switch coupled to the reference input;
- and
- a plurality of resistors connected between the second terminals of the switches and the reference output, wherein a single resistor is connected between one of the second terminal of at least one of the switches and the reference output, and wherein at least two resistors connected in parallel are connected between the second terminal of at least one of the switches and the reference output.
A digital to analog converter comprising:
- a first digital to analog array having a reference input, a reference output, a first digital input that is connectable to a digital signal, and an analog output;
- a second digital to analog array comprising:
- a digital input,
- a reference input that is connectable to a first voltage source;
- a reference output that is coupled to the reference input of the first digital to analog array;
- a plurality of switches that are controlled by signals at the digital input, each switch having a first terminal and a second terminal, the first terminal of each switch coupled to the reference input;
- a plurality of resistors connected between the second terminals of the switches and the reference output, wherein a single resistor is connected between one of the second terminal of at least one of the switches and the reference output, wherein at least two resistors connected in parallel are connected between the second terminal of at least one of the switches and the reference output, wherein four resistance values are able to be set between the reference input and the reference output, and wherein the differences between resistance values are substantially equal;
- a third digital to analog array comprising:
- a digital input,
- a reference input that is coupled to the reference output of the first digital to analog array;
- a reference output that is connectable to a second voltage source;
- a plurality of switches that are controlled by signals at the digital input, each switch having a first terminal and a second terminal, the first terminal of each switch coupled to the reference input;
- a plurality of resistors connected between the second terminals of the switches and the reference output, wherein a single resistor is connected between the second terminal of at least one of the switches and the reference output, wherein at least two resistors are connected in parallel between the second terminal of at least one of the switches and the reference output, wherein four resistance values are able to be set between the reference input and the reference output, and wherein the differences between resistance values are substantially equal.
A digital to analog converter comprising:
- a first digital to analog array having a reference input, a reference output, a first digital input that is connectable to a digital signal, and an analog output;
- a second digital to analog array comprising:
- a digital input,
- a reference input that is connectable to a first voltage source;
- a reference output that is coupled to the reference input of the first digital to analog array;
- a plurality of switches that are controlled by signals at the digital input, each switch having a first terminal and a second terminal, the first terminal of each switch coupled to the reference input;
- a plurality of resistors connected between the second terminals of the switches and the reference output, wherein a single resistor is connected between one of the second terminal of at least one of the switches and the reference output, wherein at least two resistors connected in parallel are connected between the second terminal of at least one of the switches and the reference output, wherein eight resistance values are able to be set between the reference input and the reference output, and wherein the differences between resistance values are substantially equal;
- a third digital to analog array comprising:
- a digital input,
- a reference input that is coupled to the reference output of the first digital to analog array;
- a reference output that is connectable to a second voltage source;
- a plurality of switches that are controlled by signals at the digital input, each switch having a first terminal and a second terminal, the first terminal of each switch coupled to the reference input;
- a plurality of resistors connected between the second terminals of the switches and the reference output, wherein a single resistor is connected between the second terminal of at least one of the switches and the reference output, wherein at least two resistors are connected in parallel between the second terminal of at least one of the switches and the reference output, wherein eight resistance values are able to be set between the reference input and the reference output, and wherein the differences between resistance values are substantially equal.
Dependencies are inferred from the claim text.