Background calibration of interleave timing errors in time-interleaved analog to digital converters
AssigneeMultiphy Ltd.
InventorsAnthony Eugene Zortea, Russell Romano
Life of this patent
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Abstract
A method for performing background calibration of interleave timing errors in N order Time-Interleaved Analog to Digital Converters (TIADCs), according to which N samples of the input signal are acquired in N different phases and the time-interleave error of each phase is calculated. Then the sign of each of the time-interleave error is extracted and the errors are adjusted by adjusting the timing of erroneous phases. This process is repeated until all the errors are lower than a predefined level.
Claims5
A method for performing background calibration of interleave timing errors in N order Time-Interleaved Analog to Digital Converters (TIADCs), comprising:
- a. acquiring N samples of an input signal in N different phases;
- b. calculating the time-interleave error of each phase, wherein the time-interleave error of a phase is the difference between auto-correlations of the input signal evaluated at both sides of the phase;
- c. extracting a sign of each said time-interleave error;
- d. adjusting the errors of all N difference phases by adjusting the timing of erroneous phases according to said sign;
- and
- e. repeating steps b) to d) above until all said errors are lower than a predefined level.
A method for performing background calibration of interleave timing errors in N order Time-Interleaved Analog to Digital Converters (TIADCs), comprising:
- a. acquiring N samples of the input signal in N different phases;
- b. calculating the time-interleave error of each phase;
- c. extracting a sign of each said time-interleave error;
- d. adjusting the errors of all N difference phases by adjusting the timing of erroneous phases according to said sign;
- and
- e. repeating steps b) to d) above until all said errors are lower than a predefined level;
- wherein an average time-interleave error, which exceeds a predefined correction limit, is measured and corrected by adjusting the timing of all of the phases.
Dependencies are inferred from the claim text.