Back to results
US 9,866,227 B1Granted
Sigma-delta analog-to-digital converter including loop filter having components for feedback digital-to-analog converter correction
AssigneeIntel IP Corporation
InventorsMarco Bresciani, John G. Kauffman, Udo Schuetz, Patrick Torta, Francesco Conzatti
Life of this patent
Estimating the term…
Abstract
Some embodiments include apparatus and methods using an integrator in a loop filter of a sigma-delta analog-to-digital converter (ADC), a digital-to-analog converter (DAC) located on a feedback path of the ADC, the DAC including output nodes coupled to input nodes of the integrator, and a comparator including input nodes to receive signals from output nodes of the integrator, and an output node to provide information during calibration of the DAC.
Claims20
An apparatus comprising:
- an integrator in a loop filter of an analog-to-digital converter (ADC);
- a digital-to-analog converter (DAC) located on a feedback path of the ADC, the DAC including output nodes coupled to input nodes of the integrator;
- and
- a comparator including input nodes to receive signals from output nodes of the integrator, and an output node to provide information during calibration of the DAC, the loop filter including an additional integrator, and an additional DAC located on the feedback path of the ADC, the additional DAC including output nodes coupled to input nodes of the additional integrator.
1 more element
An apparatus comprising:
- an integrator in a loop filter of an analog-to-digital converter (ADC);
- a digital-to-analog converter (DAC) located on a feedback path of the ADC, the DAC including output nodes coupled to input nodes of the integrator;
- and
- a comparator including input nodes to receive signals from output nodes of the integrator, and an output node to provide information during calibration of the DAC, wherein the loop filter further includes:
- an additional integrator;
- an additional DAC located on the feedback path of the ADC, the additional DAC including output nodes coupled to input nodes of the additional integrator;
- and
- an additional comparator including input nodes to receive signals from output nodes the additional integrator, and an output node to provide information during calibration of the additional DAC.
5 more elements
An apparatus comprising:
- an integrator in a loop filter of a sigma-delta analog-to-digital converter (ADC);
- a digital-to-analog converter (DAC) located on a feedback path of the ADC, the DAC including output nodes coupled to input nodes of the integrator, the DAC including DAC cells;
- a comparator including input nodes to receive signals from output nodes of the integrator;
- and
- logic circuitry to receive information from an output node of the comparator, the logic circuitry to provide a code to control an adjustable current source in one of the DAC cells, the loop filter including an additional integrator, and an additional DAC located on the feedback path of the ADC, the additional DAC including output nodes coupled to input nodes of the additional integrator.
2 more elements
An apparatus comprising:
- an antenna;
- and
- a receiver coupled to the antenna, the receiver including a sigma-delta analog-to-digital converter (ADC), the sigma-delta ADC including:
- an integrator in a loop filter of an analog-to-digital converter (ADC);
- a digital-to-analog converter (DAC) located on a feedback path of the ADC, the DAC including output nodes coupled to input nodes of the integrator;
- and
- a comparator including input nodes to receive signals from output nodes of the integrator, and an output node to provide information during calibration of the DAC, the loop filter including an additional integrator, and an additional DAC located on the feedback path of the ADC, the additional DAC including output nodes coupled to input nodes of the additional integrator.
4 more elements
Dependencies are inferred from the claim text.