Amplifier
AssigneeSumitomo Electric Device Innovations, Inc.
InventorNaoyuki Miyazawa
Life of this patent
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Abstract
An amplifier includes: a package which includes a pair of edge portions; an input terminal which is provided in the edge portion; output terminals which are provided in the edge portion; a first-stage FET chip which includes an input port directly connected to the input terminal by a bonding wire; a first-stage terminal which is provided in the edge portion and is directly connected to an output port of the first-stage FET chip by a bonding wire; a second-stage terminal which is provided in the edge portion; a second-stage FET chip which includes an output port directly connected to output terminals and by a bonding wire; and an impedance matching capacitor element of which one electrode is connected to the second-stage terminal and the input port of the second-stage FET chip.
Claims15
An amplifier comprising:
- a package having an input terminal, an output terminal, a first-stage terminal and a second-stage terminal;
- a first-stage amplifier chip having an input port and an output port, the input port of the first-stage amplifier chip connected directly to the input terminal by a first bonding wire, the output port of the first-stage amplifier chip connected directly to the first-stage terminal by a second bonding wire;
- and
- a second-stage amplifier chip having an input port and an output port, the input port of the second-stage amplifier chip connected to the second-stage terminal via an impedance matching element, the output port of the second-stage amplifier chip connected directly to the output terminal by a third bonding wire,
- wherein the first stage amplifier chip and the second stage amplifier chip are a type of field effect transistor (FET) chip, and
- wherein the FET chip of the second-stage amplifier chip has a size larger than a size of the FET chip of the first-stage amplifier chip.
Dependencies are inferred from the claim text.