Optical transmission circuit with upper and lower threshold control
AssigneeHitachi, Ltd.
InventorsTakashi Takemoto, Hiroki Yamashita
Life of this patent
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Abstract
The high-speed and high-quality reception operation of a transimpedance amplifier of an optical communication module and a router including the same can be achieved. A preamplifier performs current/voltage conversion with respect to intersymbol interference due to bandwidth shortage of a laser diode. A threshold control circuit which generates positive and negative threshold voltages with respect to a center potential of an output signal, latch circuits, and a selector circuit are provided to the output of the preamplifier. An NRZ signal is received as a duobinary signal based on the sign determination result of the previous bit. The determination error rate of the latch circuits can thus be improved.
Claims10
A transimpedance amplifier comprising:
- a preamplifier which receives, as an input, a single-phase current signal of an output of a photodiode and converts the single-phase current signal to a single-phase voltage signal;
- a −3 dB frequency of a laser diode which generates an optical signal inputted to the photodiode being lower than a basic frequency which is a half frequency of a communication speed;
- a threshold control circuit which detects a center potential of the single-phase voltage signal of the output of the preamplifier and generates upper and lower threshold voltages whose electric potentials are shifted to plus and minus sides with respect to the center potential;
- a first latch circuit which uses the upper threshold voltage of the output of the threshold control circuit as a threshold value and converts the single-phase voltage signal of the output of the preamplifier from an analog value to a digital value;
- a second latch circuit which uses the lower threshold voltage of the output of the threshold control circuit as a threshold value and converts the single-phase voltage signal of the output of the preamplifier from an analog value to a digital value;
- and
- a selector circuit which selects one of an output path in which sign determination is performed by the upper threshold voltage of the first latch circuit when one previous bit associated with a bit for symbol decision is at a high level (one), and an output path in which sign determination is performed by the lower threshold voltage of the second latch circuit when one previous bit associated with a bit for symbol decision is at a low level (zero).
Dependencies are inferred from the claim text.