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US 9,865,994 B2Granted
Vertical cavity surface emitting laser array and method for manufacturing the same
AssigneeMurata Manufacturing Co., Ltd.
InventorsIppei Matsubara, Takayuki Kona, Keiji Iwata
Life of this patent
Estimating the term…
Abstract
A VCSEL array includes a base substrate, a plurality of VCSEL devices and an inter-device line. Each of the plurality of VCSEL devices is disposed on a front side of the base substrate. The inter-device line connects two of the plurality of VCSEL devices that are adjacent to each other, the two VCSEL devices being connected in series such that forward directions of the two VCSEL devices are the same. An insulating groove that electrically insulates the two VCSEL devices is formed on the base substrate.
Claims16
A vertical cavity surface emitting laser array comprising:
- a semi-insulating semiconductor substrate;
- a plurality of vertical cavity surface emitting laser devices formed on a front side of the semi-insulating semiconductor substrate;
- and
- an inter-device line that connects n (n is a natural number≧2) of the plurality of vertical cavity surface emitting laser devices that are adjacent to each other, the n vertical cavity surface emitting laser devices being connected in series such that forward directions of the n vertical cavity surface emitting laser devices are the same,
- wherein an insulating region that electrically insulates the n vertical cavity surface emitting laser devices is formed on the semi-insulating semiconductor substrate
- when a resistance value of the insulating region formed between two adjacent VCSEL devices is expressed by RISO, a following formula is satisfied,
- ILEAK=(Vf×n)/RISO<If×0.1%,
- wherein ILEAK is a leak current, Vf is a value of a load voltage applied to each of the vertical cavity surface emitting laser devices connected in series, and If is a load current.
5 more elements
A method for manufacturing a vertical cavity surface emitting laser array, comprising:
- forming a plurality of vertical cavity surface emitting laser devices on a front side of a semi-insulating semiconductor substrate;
- forming an insulating region between n (n is a natural number≧2) of the plurality of vertical cavity surface emitting laser devices that are adjacent to each other, the insulating region electrically insulating the n vertical cavity surface emitting laser devices;
- and
- forming an inter-device line after the step of forming the insulating region, the inter-device line connecting the n vertical cavity surface emitting laser devices in series such that forward directions of the n vertical cavity surface emitting laser devices are the same
- when a resistance value of the insulating region formed between two adjacent VCSEL devices is expressed by RISO, a following formula is satisfied,
- ILEAK=(Vf×n)/RISO<If×0.1%,
- wherein ILEAK is a leak current, Vf is a value of a load voltage applied to each of the vertical cavity surface emitting laser devices connected in series, and If is a load current.
4 more elements
A vertical cavity surface emitting laser array comprising:
- a semiconductor substrate;
- a plurality of vertical cavity surface emitting laser devices formed on a front side of the semiconductor substrate;
- and
- an inter-device line that connects n (n is a natural number≧2) of the plurality of vertical cavity surface emitting laser devices that are adjacent to each other, the n vertical cavity surface emitting laser devices being connected in series such that forward directions of the n vertical cavity surface emitting laser devices are the same,
- wherein an insulating region that electrically insulates the n vertical cavity surface emitting laser devices is formed on the semiconductor substrate, the insulating region being an ion implanted region formed to divide a layer that is provided on the semiconductor substrate and on which the n vertical cavity surface emitting laser devices are formed, the high resistance region having an electrical resistivity higher than an electrical resistivity of the semiconductor substrate,
- when a resistance value of the insulating region formed between two adjacent VCSEL devices is expressed by RISO, a following formula is satisfied
- ILEAK=(Vf×n)/RISO<If×0.1%,
- wherein ILEAK is a leak current, Vf is a value of a load voltage applied to each of the vertical cavity surface emitting laser devices connected in series, and If is a load current.
5 more elements
A method for manufacturing a vertical cavity surface emitting laser array, comprising:
- forming a plurality of vertical cavity surface emitting laser devices on a front side of a semiconductor substrate;
- forming an insulating region including a high resistance region between n (n is a natural number≧2) of the plurality of vertical cavity surface emitting laser devices that are adjacent to each other, the insulating region electrically insulating the n vertical cavity surface emitting laser devices;
- and
- forming an inter-device line after the step of forming the insulating region, the inter-device line connecting the n vertical cavity surface emitting laser devices in series such that forward directions of the n vertical cavity surface emitting laser devices are the same, wherein
- the forming of the insulating region includes forming a high resistance region by ion implantation to divide a layer that is provided on the semiconductor substrate and on which the n vertical cavity surface emitting laser devices are formed, the high resistance region having an electrical resistivity higher than an electrical resistivity of the semiconductor substrate,
- when a resistance value of the insulating region formed between two adjacent VCSEL devices is expressed by RISO, a following formula is satisfied
- ILEAK=(Vf×n)/RISO<If×0.1%,
- wherein ILEAK is leak current, Vf is load voltage applied to each of the vertical cavity surface emitting laser devices connected in series, and If is load current.
5 more elements
Dependencies are inferred from the claim text.