Resistive memory cell having a single bottom electrode and two top electrodes
AssigneeMicrochip Technology Incorporated
InventorsPaul Fest, James Walls
Life of this patent
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AssigneeMicrochip Technology Incorporated
InventorsPaul Fest, James Walls
Estimating the term…
A method of forming a resistive memory cell, e.g., a CBRAM or ReRAM, may include forming a bottom electrode layer, forming an oxide region of an exposed area of the bottom electrode, removing a region of the bottom electrode layer proximate the oxide region to form a bottom electrode having a pointed tip or edge region, and forming first and second electrolyte regions and first and second top electrodes over the bottom electrode to define distinct first and second memory elements. The first memory element defines a first conductive filament/vacancy chain path from the first portion of the bottom electrode pointed tip region to the first top electrode via the first electrolyte region, and second memory element defines a second conductive filament/vacancy chain path from the second portion of the bottom electrode pointed tip region to the second top electrode via the second electrolyte region.
An array of resistive memory structures, each memory structure comprising:
An memory device comprising:
A memory cell comprising:
Dependencies are inferred from the claim text.