Process for fabrication of superconducting vias for electrical connection to groundplane in cryogenic detectors

A system comprising:

• a processor;
• and
• a computer-readable storage device storing instructions which, when executed by the processor, cause the processor to perform operations comprising:
• depositing a superconducting groundplane onto a substrate, wherein
• the superconducting groundplane comprises an oxidizing layer that is observed to oxidize when exposed to an oxygen rich etching plasma and a non-oxidizing layer on top of the oxidizing layer, the non-oxidizing layer comprising a material that is observed to resist oxidation when exposed to the oxygen rich etching plasma;
• bonding a layer of monocrystalline silicon to the superconducting groundplane;
• applying a photoresist layer to the layer of monocrystalline silicon, the photoresist layer having a pattern that comprises a gap in the photoresist layer that exposes a portion of the layer of the monocrystalline silicon to yield an exposed portion of the layer of the monocrystalline silicon;
• etching the photoresist layer and the exposed portion of the layer of the monocrystalline silicon with the oxygen rich etching plasma, resulting in a monocrystalline silicon top layer with a via that exposes the superconducting groundplane;
• and
• depositing a superconducting surface layer to cover the via.

A computer-readable storage device storing instructions which, when executed by a processor, cause the processor to control a group of components to perform operations comprising:

• depositing a superconducting groundplane onto a substrate, wherein the superconducting groundplane comprises an oxidizing layer that is observed to oxidize when exposed to an oxygen rich etching plasma and a non-oxidizing layer on top of the oxidizing layer, the non-oxidizing layer comprising a material that is observed to resist oxidation when exposed to the oxygen rich etching plasma;
• bonding a layer of monocrystalline silicon to the superconducting groundplane;
• applying a photoresist layer to the layer of monocrystalline silicon, the photoresist layer having a pattern that comprises a gap in the photoresist layer that exposes a portion of the layer of the monocrystalline silicon to yield an exposed portion of the layer of the monocrystalline silicon;
• etching the photoresist layer and the exposed portion of the layer of the monocrystalline silicon with the oxygen rich etching plasma, resulting in a monocrystalline silicon top layer with a via that exposes the superconducting groundplane;
• and
• depositing a superconducting surface layer to cover the via.