Horizontal gate all around and FinFET device isolation

A device structure, comprising:

• a substrate;
• a channel structure formed on the substrate, the channel structure having one or more silicon material layers, one or more silicon germanium material layers comprising between about 20% and about 40% germanium, and a buried oxide layer, wherein the silicon material layers, the silicon germanium material layers, and the buried oxide layer are disposed in a stacked arrangement;
• source/drain regions formed on the substrate;
• and
• a metal gate structure formed over the channel structure.

A device structure, comprising:

• a substrate;
• a channel structure having a buried oxide layer disposed on and in contact with the substrate and a silicon layer or silicon germanium layer comprising between about 20% and about 40% germanium disposed on the buried oxide layer;
• source/drain regions formed on the substrate;
• and
• a metal gate structure formed over the silicon layer or silicon germanium layer.