Switching device

A switching device comprising:

• a semiconductor substrate;
• a gate insulating film;
• a gate electrode;
• an interlayer insulating film;
• a first metal layer;
• a second metal layer, and an insulating protective film,
• wherein,
• a trench extending in a mesh-shape is provided in an upper surface of the semiconductor substrate,
• the gate insulating film covers an inner surface of the trench,
• the gate electrode is disposed inside the trench, the gate electrode being insulated from the semiconductor substrate by the gate insulating film,
• when each region of the semiconductor substrate surrounded by the trench in a plan view of the upper surface is termed as a cell region, a range including a plurality of the cell regions in the plan view of the upper surface as a first element range, a range surrounding a periphery of the first element range in the plan view of the upper surface and including a plurality of the cell regions being termed as a surrounding range, the interlayer insulating film covering the upper surface and the gate electrode in a range across the first element range and the surrounding range,
• within the first element range, a contact hole is provided in the interlayer insulating film above each of the cell regions,
• within the surrounding range, the interlayer insulating film covers an entirety of the upper surface above the cell regions,
• the first metal layer covers the interlayer insulating film, being insulated from the gate electrode by the interlayer insulating film, being in contact with the upper surface within the contact hole,
• a recess is provided on a surface of the first metal layer above the contact hole,
• the insulating protective film covers an outer peripheral side portion of the first metal layer in the surrounding range,
• an opening is provided in the insulating protective film in a range wider than the first element range and including the first element range,
• the second metal layer is in contact with the surface of the first metal layer in the opening and is in contact with a side surface of the opening, the second metal layer having a linear expansion coefficient smaller than a linear expansion coefficient of the first metal layer,
• each of the cell regions within the first element range comprises:
• a first region of a first conductivity type, being in contact with the first metal layer and the gate insulating film, and
• a body region of a second conductivity type, being in contact with the first metal layer and being in contact with the gate insulating film below the first region,
• each cell region within the surrounding range comprises a second conductivity type peripheral region of the second conductivity type, the second conductivity type peripheral region extending to below a lower end of the trench within the surrounding range and being electrically connected to the body region, and
• the semiconductor substrate comprises a second region of the first conductivity type, the second region being disposed across below the body region and below the second conductivity type peripheral region, being in contact with the gate insulating film below the body region, and being separated from the first regions by the body region.